217 lines
6.5 KiB
C
217 lines
6.5 KiB
C
/*
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* Copyright 2018 Schuyler St. Leger
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* Copyright 2021 Great Scott Gadgets
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "operacake_sctimer.h"
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#include <hackrf_core.h>
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#include <libopencm3/lpc43xx/sgpio.h>
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#include <libopencm3/lpc43xx/rgu.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/gima.h>
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#include "sct.h"
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#define U1CTRL_SET SCT_OUT14_SET
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#define U1CTRL_CLR SCT_OUT14_CLR
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#define U2CTRL0_SET SCT_OUT13_SET
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#define U2CTRL0_CLR SCT_OUT13_CLR
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#define U2CTRL1_SET SCT_OUT12_SET
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#define U2CTRL1_CLR SCT_OUT12_CLR
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#define U3CTRL0_SET SCT_OUT11_SET
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#define U3CTRL0_CLR SCT_OUT11_CLR
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#define U3CTRL1_SET SCT_OUT8_SET
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#define U3CTRL1_CLR SCT_OUT8_CLR
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static uint32_t default_output = 0;
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/**
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* Configure the SCTimer to rotate the antennas with the Operacake in phase with
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* the sample clock. This will configure the SCTimer to output to the pins for
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* GPIO control of the Operacake, however the Operacake must be configured for
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* GPIO control. The timing is not set in this function.
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*
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* To trigger the antenna switching synchronously with the sample clock, the
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* SGPIO is configured to output its clock (f=2 * sample clock) to the SCTimer.
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*/
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void operacake_sctimer_init() {
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// We start by resetting the SCTimer
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RESET_CTRL1 = RESET_CTRL1_SCT_RST;
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// Delay to allow reset sigal to be processed
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// The reset generator uses a 12MHz clock (IRC)
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// The difference between this and the core clock (CCLK)
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// determines this value (CCLK/IRC).
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// The value used here is a bit shorter than would be required, since
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// there are additional instructions that fill the time. If the duration of
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// the actions from here to the first access to the SCTimer is changed, then
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// this delay may need to be increased.
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delay(8);
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// Pin definitions for the HackRF
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// U2CTRL0
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scu_pinmux(P7_4, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
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// U2CTRL1
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scu_pinmux(P7_5, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
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// U3CTRL0
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scu_pinmux(P7_6, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
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// U3CTRL1
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scu_pinmux(P7_7, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
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// U1CTRL
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scu_pinmux(P7_0, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1);
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// Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12
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SGPIO_OUT_MUX_CFG12 =
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SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode
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SGPIO_OUT_MUX_CFG_P_OE_CFG(0); // gpio_oe
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SGPIO_GPIO_OENREG |= BIT12;
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// Use the GIMA to connect the SGPIO clock to the SCTimer
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GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1
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// We configure this register first, because the user manual says to
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SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT
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| SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK
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| SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1;
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// Halt the SCTimer to enable it to be configured
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SCT_CTRL = SCT_CTRL_HALT_L(1);
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// Prescaler - run at half the SGPIO clock (ie: at the sample clock)
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SCT_CTRL |= SCT_CTRL_PRE_L(1);
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// Default to state 0, events disabled
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SCT_STATE = 0;
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// Enable the SCTimer
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SCT_CTRL &= ~SCT_CTRL_HALT_L(1);
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}
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static uint32_t operacake_sctimer_port_to_output(uint8_t port) {
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int bit0 = (port >> 0) & 1;
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int bit1 = (port >> 1) & 1;
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int bit2 = (port >> 2) & 1;
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return (bit0 << 11) | (bit0 << 13) |
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(bit1 << 8) | (bit1 << 12) |
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(((~bit2)&1) << 14);
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}
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void operacake_sctimer_enable(bool enable) {
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SCT_CTRL = SCT_CTRL_HALT_L(1);
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SCT_STATE = enable;
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SCT_CTRL &= ~SCT_CTRL_HALT_L(1);
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}
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void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int n) {
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SCT_CTRL = SCT_CTRL_HALT_L(1);
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uint32_t counter = 0;
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uint32_t bit0_set = 0, bit0_clr = 0, bit1_set = 0, bit1_clr = 0, bit2_set = 0, bit2_clr = 0;
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for (int i = 0; i < n; i++) {
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// Enable event i in state 1, set to match on match register i
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SCT_EVn_STATE(i) = SCT_EVn_STATE_STATEMSK1(1);
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SCT_EVn_CTRL(i) = SCT_EVn_CTRL_COMBMODE_MATCH | SCT_EVn_CTRL_MATCHSEL(i);
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// Calculate the counter value to match on
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counter += times[i].dwell;
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// Wrapping from SCT_LIMIT seems to add an extra cycle,
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// so we reduce the counter value for the first event.
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if (i == 0)
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counter -= 1;
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SCT_MATCHn(i) = counter;
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SCT_MATCHRELn(i) = counter;
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// The match event selects the *next* port, so retreive that here.
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int port;
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if (i == n - 1) {
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port = times[0].port;
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} else {
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port = times[i+1].port;
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}
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int bit0 = (port >> 0) & 1;
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int bit1 = (port >> 1) & 1;
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int bit2 = (port >> 2) & 1;
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// Find bits to set/clear on event i
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bit0_set |= SCT_OUTn_SETm( bit0, i);
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bit0_clr |= SCT_OUTn_CLRm(~bit0, i);
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bit1_set |= SCT_OUTn_SETm( bit1, i);
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bit1_clr |= SCT_OUTn_CLRm(~bit1, i);
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// (U1CTRL is inverted)
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bit2_set |= SCT_OUTn_SETm(~bit2, i);
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bit2_clr |= SCT_OUTn_CLRm( bit2, i);
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}
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// Apply event set/clear mappings
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U2CTRL0_SET = bit0_set;
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U2CTRL0_CLR = bit0_clr;
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U3CTRL0_SET = bit0_set;
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U3CTRL0_CLR = bit0_clr;
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U2CTRL1_SET = bit1_set;
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U2CTRL1_CLR = bit1_clr;
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U3CTRL1_SET = bit1_set;
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U3CTRL1_CLR = bit1_clr;
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U1CTRL_SET = bit2_set;
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U1CTRL_CLR = bit2_clr;
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// Set output pins to select the first port in the list
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default_output = operacake_sctimer_port_to_output(times[0].port);
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SCT_OUTPUT = default_output;
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// Reset counter on final event
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SCT_LIMIT = (1 << (n-1));
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SCT_CTRL &= ~SCT_CTRL_HALT_L(1);
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}
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void operacake_sctimer_stop() {
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// Halt timer
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SCT_CTRL |= SCT_CTRL_HALT_L(1);
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}
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/**
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* This will reset the state of the SCTimer, but retains its configuration.
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* This reset will return the selected antenna to 1 and samesided. This is
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* called by set_transceiver_mode so the HackRF starts capturing with the
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* same antenna selected each time.
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*/
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void operacake_sctimer_reset_state() {
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SCT_CTRL |= SCT_CTRL_HALT_L(1);
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// Clear the counter value
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SCT_CTRL |= SCT_CTRL_CLRCTR_L(1);
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// Reset to select the first port
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SCT_OUTPUT = default_output;
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SCT_CTRL &= ~SCT_CTRL_HALT_L(1);
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}
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