419 lines
14 KiB
C
419 lines
14 KiB
C
/*
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* Copyright 2019 Jared Boone <jared@sharebrained.com>
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "cpld_xc2c.h"
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#include "crc.h"
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#include <stddef.h>
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#include <string.h>
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typedef enum {
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CPLD_XC2C_IR_INTEST = 0b00000010,
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CPLD_XC2C_IR_BYPASS = 0b11111111,
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CPLD_XC2C_IR_SAMPLE = 0b00000011,
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CPLD_XC2C_IR_EXTEST = 0b00000000,
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CPLD_XC2C_IR_IDCODE = 0b00000001,
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CPLD_XC2C_IR_USERCODE = 0b11111101,
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CPLD_XC2C_IR_HIGHZ = 0b11111100,
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CPLD_XC2C_IR_ISC_ENABLE_CLAMP = 0b11101001,
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CPLD_XC2C_IR_ISC_ENABLE_OTF = 0b11100100,
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CPLD_XC2C_IR_ISC_ENABLE = 0b11101000,
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CPLD_XC2C_IR_ISC_SRAM_READ = 0b11100111,
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CPLD_XC2C_IR_ISC_WRITE = 0b11100110,
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CPLD_XC2C_IR_ISC_ERASE = 0b11101101,
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CPLD_XC2C_IR_ISC_PROGRAM = 0b11101010,
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CPLD_XC2C_IR_ISC_READ = 0b11101110,
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CPLD_XC2C_IR_ISC_INIT = 0b11110000,
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CPLD_XC2C_IR_ISC_DISABLE = 0b11000000,
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CPLD_XC2C_IR_TEST_ENABLE = 0b00010001,
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CPLD_XC2C_IR_BULKPROG = 0b00010010,
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CPLD_XC2C_IR_ERASE_ALL = 0b00010100,
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CPLD_XC2C_IR_MVERIFY = 0b00010011,
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CPLD_XC2C_IR_TEST_DISABLE = 0b00010101,
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CPLD_XC2C_IR_STCTEST = 0b00010110,
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CPLD_XC2C_IR_ISC_NOOP = 0b11100000,
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} cpld_xc2c_ir_t;
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static bool cpld_xc2c_jtag_clock(const jtag_t* const jtag, const uint32_t tms, const uint32_t tdi) {
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// 8 ns TMS/TDI to TCK setup
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gpio_write(jtag->gpio->gpio_tdi, tdi);
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gpio_write(jtag->gpio->gpio_tms, tms);
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// 20 ns TCK high time
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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gpio_clear(jtag->gpio->gpio_tck);
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// 25 ns TCK falling edge to TDO valid
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// 20 ns TCK low time
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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gpio_set(jtag->gpio->gpio_tck);
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// 15 ns TCK to TMS/TDI hold time
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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__asm__("nop");
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return gpio_read(jtag->gpio->gpio_tdo);
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}
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static void cpld_xc2c_jtag_shift_ptr_tms(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t start, const size_t end, const bool tms) {
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for(size_t i=start; i<end; i++) {
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const size_t byte_n = i >> 3;
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const size_t bit_n = i & 7;
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const uint32_t mask = (1U << bit_n);
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const uint32_t tdo = cpld_xc2c_jtag_clock(jtag, tms, tdi_tdo[byte_n] & mask) ? 1 : 0;
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tdi_tdo[byte_n] &= ~mask;
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tdi_tdo[byte_n] |= (tdo << bit_n);
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}
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}
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static void cpld_xc2c_jtag_shift_ptr(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t count) {
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if( count > 0 ) {
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cpld_xc2c_jtag_shift_ptr_tms(jtag, tdi_tdo, 0, count - 1, false);
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cpld_xc2c_jtag_shift_ptr_tms(jtag, tdi_tdo, count - 1, count, true);
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}
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}
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static uint32_t cpld_xc2c_jtag_shift_u32(const jtag_t* const jtag, const uint32_t tms, const uint32_t tdi, const size_t count) {
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uint32_t tdo = 0;
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for(size_t i=0; i<count; i++) {
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const uint32_t mask = (1U << i);
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tdo |= cpld_xc2c_jtag_clock(jtag, tms & mask, tdi & mask) << i;
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}
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return tdo;
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}
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static void cpld_xc2c_jtag_clocks(const jtag_t* const jtag, const size_t count) {
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for(size_t i=0; i<count; i++) {
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cpld_xc2c_jtag_clock(jtag, 0, 0);
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}
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}
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static void cpld_xc2c_jtag_pause(const jtag_t* const jtag, const size_t count) {
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for(size_t i=0; i<count; i++) {
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cpld_xc2c_jtag_clock(jtag, (i == (count - 1)), 0);
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}
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}
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static void cpld_xc2c_jtag_shift_dr_ir(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t bit_count, const size_t pause_count) {
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/* Run-Test/Idle or Select-DR-Scan -> Shift-DR or Shift-IR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b001, 0b000, 3);
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/* Shift-[DI]R -> Exit1-[DI]R */
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cpld_xc2c_jtag_shift_ptr(jtag, tdi_tdo, bit_count);
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if( pause_count ) {
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/* Exit1-[DI]R -> Pause-[DI]R */
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cpld_xc2c_jtag_shift_u32(jtag, 0b0, 0, 1);
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/* Pause-[DI]R -> Exit2-[DI]R */
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cpld_xc2c_jtag_pause(jtag, pause_count);
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}
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/* Exit1-[DI]R or Exit2-[DI]R -> Run-Test/Idle */
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cpld_xc2c_jtag_shift_u32(jtag, 0b01, 0, 2);
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}
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static void cpld_xc2c_jtag_shift_dr(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t bit_count, const size_t pause_count) {
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cpld_xc2c_jtag_shift_dr_ir(jtag, tdi_tdo, bit_count, pause_count);
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}
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static uint8_t cpld_xc2c_jtag_shift_ir_pause(const jtag_t* const jtag, const cpld_xc2c_ir_t ir, const size_t pause_count) {
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/* Run-Test/Idle -> Select-DR-Scan */
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cpld_xc2c_jtag_shift_u32(jtag, 0b1, 0b0, 1);
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uint8_t value = ir;
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cpld_xc2c_jtag_shift_dr_ir(jtag, &value, 8, pause_count);
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return value;
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}
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static uint8_t cpld_xc2c_jtag_shift_ir(const jtag_t* const jtag, const cpld_xc2c_ir_t ir) {
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return cpld_xc2c_jtag_shift_ir_pause(jtag, ir, 0);
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}
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static void cpld_xc2c_jtag_reset(const jtag_t* const jtag) {
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/* Five TMS=1 to reach Test-Logic-Reset from any point in the TAP state diagram.
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*/
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cpld_xc2c_jtag_shift_u32(jtag, 0b11111, 0, 5);
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}
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static void cpld_xc2c_jtag_reset_and_idle(const jtag_t* const jtag) {
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/* Five TMS=1 to reach Test-Logic-Reset from any point in the TAP state diagram.
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* One TMS=0 to move from Test-Logic-Reset to Run-Test-Idle.
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*/
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cpld_xc2c_jtag_reset(jtag);
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cpld_xc2c_jtag_shift_u32(jtag, 0, 0, 1);
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}
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static uint32_t cpld_xc2c_jtag_idcode(const jtag_t* const jtag) {
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/* Enter and end at Run-Test-Idle state. */
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_IDCODE);
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uint32_t result = 0;
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cpld_xc2c_jtag_shift_dr(jtag, (uint8_t*)&result, 32, 0);
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return result;
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}
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static bool cpld_xc2c64a_jtag_idcode_ok(const jtag_t* const jtag) {
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return ((cpld_xc2c_jtag_idcode(jtag) ^ 0xf6e5f093) & 0x0fff8fff) == 0;
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}
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static void cpld_xc2c_jtag_conld(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_DISABLE);
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cpld_xc2c_jtag_clocks(jtag, 100);
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}
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static void cpld_xc2c_jtag_enable(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_ENABLE);
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cpld_xc2c_jtag_clocks(jtag, 800);
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}
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static void cpld_xc2c_jtag_disable(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_DISABLE);
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cpld_xc2c_jtag_clocks(jtag, 100);
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}
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static void cpld_xc2c_jtag_sram_write(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_WRITE);
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}
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static void cpld_xc2c_jtag_sram_read(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_SRAM_READ);
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}
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static uint32_t cpld_xc2c_jtag_bypass(const jtag_t* const jtag, const bool shift_dr) {
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const uint8_t result = cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_BYPASS);
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if( shift_dr ) {
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uint8_t dr = 0;
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cpld_xc2c_jtag_shift_dr(jtag, &dr, 1, 0);
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}
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return result;
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}
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static bool cpld_xc2c_jtag_read_write_protect(const jtag_t* const jtag) {
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/* Enter and end at Run-Test-Idle state. */
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return ((cpld_xc2c_jtag_bypass(jtag, false) ^ 0x01) & 0x03) == 0;
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}
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static bool cpld_xc2c_jtag_is_done(const jtag_t* const jtag) {
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return ((cpld_xc2c_jtag_bypass(jtag, false) ^ 0x05) & 0x07) == 0;
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}
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static void cpld_xc2c_jtag_init_special(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_INIT);
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cpld_xc2c_jtag_clocks(jtag, 20);
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/* Run-Test/Idle -> Shift-IR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b0011, 0b0000, 4);
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/* Shift-IR: 0xf0 -> Exit1-IR */
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cpld_xc2c_jtag_shift_u32(jtag, 0x80, CPLD_XC2C_IR_ISC_INIT, 8);
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/* Exit1-IR -> Pause-IR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b0, 0, 1);
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/* Pause-IR -> Exit2-IR -> Update-IR -> Select-DR-Scan -> Capture-DR -> Exit1-DR -> Update-DR -> Run-Test/Idle */
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cpld_xc2c_jtag_shift_u32(jtag, 0b0110111, 0, 7);
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cpld_xc2c_jtag_clocks(jtag, 800);
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}
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static void cpld_xc2c_jtag_read(const jtag_t* const jtag) {
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cpld_xc2c_jtag_shift_ir_pause(jtag, CPLD_XC2C_IR_ISC_READ, 1);
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}
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static void cpld_xc2c64a_jtag_read_row(const jtag_t* const jtag, uint8_t address, uint8_t* const dr) {
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cpld_xc2c_jtag_shift_dr(jtag, &address, 7, 20);
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cpld_xc2c_jtag_clocks(jtag, 100);
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/* Set array to all ones so we don't transmit memory contents over TDI, and if we're not
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* reading a full byte's worth of bits, the excess bits will be zero.
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*/
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memset(dr, 0xff, CPLD_XC2C64A_BYTES_IN_ROW);
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cpld_xc2c_jtag_shift_dr(jtag, dr, CPLD_XC2C64A_BITS_IN_ROW, 0);
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cpld_xc2c_jtag_clocks(jtag, 100);
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}
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bool cpld_xc2c64a_jtag_checksum(
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const jtag_t* const jtag,
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const cpld_xc2c64a_verify_t* const verify,
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uint32_t* const crc_value
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) {
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cpld_xc2c_jtag_reset_and_idle(jtag);
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if( cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_read_write_protect(jtag) &&
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cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_read_write_protect(jtag) ) {
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cpld_xc2c_jtag_bypass(jtag, false);
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cpld_xc2c_jtag_enable(jtag);
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cpld_xc2c_jtag_enable(jtag);
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cpld_xc2c_jtag_enable(jtag);
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cpld_xc2c_jtag_read(jtag);
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crc32_t crc;
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crc32_init(&crc);
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uint8_t dr[CPLD_XC2C64A_BYTES_IN_ROW];
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for(size_t row=0; row<CPLD_XC2C64A_ROWS; row++) {
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const size_t address = cpld_hackrf_row_addresses.address[row];
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cpld_xc2c64a_jtag_read_row(jtag, address, dr);
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const size_t mask_index = verify->mask_index[row];
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for(size_t i=0; i<CPLD_XC2C64A_BYTES_IN_ROW; i++) {
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dr[i] &= verify->mask[mask_index].value[i];
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}
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/* Important checksum calculation NOTE:
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* Do checksum of all bits in row bytes, but ensure that invalid bits
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* are set to zero by masking. This subtlety just wasted several hours
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* of my life...
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*/
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crc32_update(&crc, dr, CPLD_XC2C64A_BYTES_IN_ROW);
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}
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*crc_value = crc32_digest(&crc);
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cpld_xc2c_jtag_init_special(jtag);
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cpld_xc2c_jtag_conld(jtag);
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if( cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_is_done(jtag) ) {
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cpld_xc2c_jtag_conld(jtag);
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cpld_xc2c_jtag_bypass(jtag, false);
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cpld_xc2c_jtag_bypass(jtag, true);
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return true;
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}
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}
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cpld_xc2c_jtag_reset_and_idle(jtag);
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return false;
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}
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static void cpld_xc2c64a_jtag_sram_write_row(const jtag_t* const jtag, uint8_t address, const uint8_t* const data) {
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uint8_t write[CPLD_XC2C64A_BYTES_IN_ROW];
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memcpy(&write[0], data, sizeof(write));
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/* Update-IR or Run-Test/Idle -> Shift-DR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b001, 0b000, 3);
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/* Shift-DR -> Shift-DR */
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cpld_xc2c_jtag_shift_ptr_tms(jtag, &write[0], 0, CPLD_XC2C64A_BITS_IN_ROW, false);
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/* Shift-DR -> Exit1-DR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b1000000, address, 7);
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/* Exit1-DR -> Update-DR -> Run-Test/Idle */
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cpld_xc2c_jtag_shift_u32(jtag, 0b01, 0b00, 2);
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}
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static void cpld_xc2c64a_jtag_sram_read_row(const jtag_t* const jtag, uint8_t* const data, const uint8_t next_address) {
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/* Run-Test/Idle -> Shift-DR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b001, 0b000, 3);
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/* Shift-DR */
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cpld_xc2c_jtag_shift_ptr_tms(jtag, data, 0, CPLD_XC2C64A_BITS_IN_ROW, false);
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/* Shift-DR -> Exit1-DR */
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cpld_xc2c_jtag_shift_u32(jtag, 0b1000000, next_address, 7);
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/* Weird, non-IEEE1532 compliant path through TAP machine, described in Xilinx
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* Programmer Qualification Specification, applicable only to XC2C64/A.
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* Exit1-DR -> Pause-DR -> Exit2-DR -> Update-DR -> Run-Test/Idle
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*/
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cpld_xc2c_jtag_shift_u32(jtag, 0b0110, 0b0000, 4);
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}
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static bool cpld_xc2c64a_jtag_sram_compare_row(const jtag_t* const jtag, const uint8_t* const expected, const uint8_t* const mask, const uint8_t next_address) {
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/* Run-Test/Idle -> Shift-DR */
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uint8_t read[CPLD_XC2C64A_BYTES_IN_ROW];
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memset(read, 0xff, sizeof(read));
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cpld_xc2c64a_jtag_sram_read_row(jtag, &read[0], next_address);
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bool matched = true;
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if( (expected != NULL) && (mask != NULL) ) {
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for(size_t i=0; i<CPLD_XC2C64A_BYTES_IN_ROW; i++) {
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const uint8_t significant_differences = (read[i] ^ expected[i]) & mask[i];
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matched &= (significant_differences == 0);
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}
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}
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return matched;
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}
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void cpld_xc2c64a_jtag_sram_write(
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const jtag_t* const jtag,
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const cpld_xc2c64a_program_t* const program
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) {
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cpld_xc2c_jtag_reset_and_idle(jtag);
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cpld_xc2c_jtag_enable(jtag);
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cpld_xc2c_jtag_sram_write(jtag);
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for(size_t row=0; row<CPLD_XC2C64A_ROWS; row++) {
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const uint8_t address = cpld_hackrf_row_addresses.address[row];
|
|
cpld_xc2c64a_jtag_sram_write_row(jtag, address, &program->row[row].data[0]);
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}
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|
|
|
cpld_xc2c_jtag_disable(jtag);
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|
cpld_xc2c_jtag_bypass(jtag, false);
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|
cpld_xc2c_jtag_reset(jtag);
|
|
}
|
|
|
|
bool cpld_xc2c64a_jtag_sram_verify(
|
|
const jtag_t* const jtag,
|
|
const cpld_xc2c64a_program_t* const program,
|
|
const cpld_xc2c64a_verify_t* const verify
|
|
) {
|
|
cpld_xc2c_jtag_reset_and_idle(jtag);
|
|
cpld_xc2c_jtag_enable(jtag);
|
|
|
|
cpld_xc2c_jtag_sram_read(jtag);
|
|
|
|
/* Tricky loop to read dummy row first, then first address, then loop back to get
|
|
* the first row's data.
|
|
*/
|
|
bool matched = true;
|
|
for(size_t address_row=0; address_row<=CPLD_XC2C64A_ROWS; address_row++) {
|
|
const int data_row = (int)address_row - 1;
|
|
const size_t mask_index = (data_row >= 0) ? verify->mask_index[data_row] : 0;
|
|
const uint8_t* const expected = (data_row >= 0) ? &program->row[data_row].data[0] : NULL;
|
|
const uint8_t* const mask = (data_row >= 0) ? &verify->mask[mask_index].value[0] : NULL;
|
|
const uint8_t next_address = (address_row < CPLD_XC2C64A_ROWS) ? cpld_hackrf_row_addresses.address[address_row] : 0;
|
|
matched &= cpld_xc2c64a_jtag_sram_compare_row(jtag, expected, mask, next_address);
|
|
}
|
|
|
|
cpld_xc2c_jtag_disable(jtag);
|
|
cpld_xc2c_jtag_bypass(jtag, false);
|
|
cpld_xc2c_jtag_reset(jtag);
|
|
|
|
return matched;
|
|
}
|