207 lines
6.2 KiB
ReStructuredText
207 lines
6.2 KiB
ReStructuredText
================================================
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LPC43xx Debugging
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================================================
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Various debugger options for the LPC43xx exist.
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Black Magic Probe
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~~~~~~~~~~~~~~~~~
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`https://github.com/blacksphere/blackmagic <https://github.com/blacksphere/blackmagic>`__
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An example of using gdb with the Black Magic Probe:
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.. code-block :: sh
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arm-none-eabi-gdb -n blinky.elf
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target extended-remote /dev/ttyACM0
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monitor swdp_scan
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attach 1
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set {int}0x40043100 = 0x10000000
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load
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cont
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It is possible to attach to the M0 instead of the M4 if you use jtag_scan instead of swdp_scan, but the Black Magic Probe had some bugs when trying to work with the M0 the last time I tried it.
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LPC-Link
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~~~~~~~~
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(included with LPCXpresso boards)
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TitanMKD has had some success. See the tutorial in hackrf/doc/LPCXPresso_Flash_Debug_Tutorial.pdf or .odt (PDF and OpenOffice document) Doc Link [https://github.com/mossmann/hackrf/tree/master/doc)
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ST-LINK/V2
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~~~~~~~~~~
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Hardware Configuration
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^^^^^^^^^^^^^^^^^^^^^^
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Start with an STM32F4-Discovery board. Remove the jumpers from CN3. Connect the target's SWD interface to CN2 "SWD" connector.
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Software Configuration
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^^^^^^^^^^^^^^^^^^^^^^
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I'm using libusb-1.0.9.
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Install OpenOCD-0.6.0 dev
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+++++++++++++++++++++++++
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.. code-block:: sh
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# Cloned at hash a21affa42906f55311ec047782a427fcbcb98994
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git clone git://openocd.git.sourceforge.net/gitroot/openocd/openocd
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cd openocd
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./bootstrap
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./configure --enable-stlink --enable-buspirate --enable-jlink --enable-maintainer-mode
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make
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sudo make install
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OpenOCD configuration files
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+++++++++++++++++++++++++++
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openocd.cfg
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.. code-block:: sh
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#debug_level 3
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source [find interface/stlink-v2.cfg]
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source ./lpc4350.cfg
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lpc4350.cfg
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.. code-block :: sh
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set _CHIPNAME lpc4350
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set _M0_CPUTAPID 0x4ba00477
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set _M4_SWDTAPID 0x2ba01477
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set _M0_TAPID 0x0BA01477
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set _TRANSPORT stlink_swd
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transport select $_TRANSPORT
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stlink newtap $_CHIPNAME m4 -expected-id $_M4_SWDTAPID
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stlink newtap $_CHIPNAME m0 -expected-id $_M0_TAPID
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target create $_CHIPNAME.m4 stm32_stlink -chain-position $_CHIPNAME.m4
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#target create $_CHIPNAME.m0 stm32_stlink -chain-position $_CHIPNAME.m0
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target.xml, nabbed from an OpenOCD mailing list thread, to fix a communication problem between GDB and newer OpenOCD builds.
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.. code-block:: sh
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<?xml version="1.0"?>
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<!DOCTYPE target SYSTEM "gdb-target.dtd">
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<target>
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<feature name="org.gnu.gdb.arm.core">
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<reg name="r0" bitsize="32" type="uint32"/>
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<reg name="r1" bitsize="32" type="uint32"/>
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<reg name="r2" bitsize="32" type="uint32"/>
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<reg name="r3" bitsize="32" type="uint32"/>
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<reg name="r4" bitsize="32" type="uint32"/>
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<reg name="r5" bitsize="32" type="uint32"/>
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<reg name="r6" bitsize="32" type="uint32"/>
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<reg name="r7" bitsize="32" type="uint32"/>
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<reg name="r8" bitsize="32" type="uint32"/>
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<reg name="r9" bitsize="32" type="uint32"/>
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<reg name="r10" bitsize="32" type="uint32"/>
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<reg name="r11" bitsize="32" type="uint32"/>
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<reg name="r12" bitsize="32" type="uint32"/>
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<reg name="sp" bitsize="32" type="data_ptr"/>
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<reg name="lr" bitsize="32"/>
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<reg name="pc" bitsize="32" type="code_ptr"/>
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<reg name="cpsr" bitsize="32" regnum="25"/>
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</feature>
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<feature name="org.gnu.gdb.arm.fpa">
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<reg name="f0" bitsize="96" type="arm_fpa_ext" regnum="16"/>
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<reg name="f1" bitsize="96" type="arm_fpa_ext"/>
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<reg name="f2" bitsize="96" type="arm_fpa_ext"/>
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<reg name="f3" bitsize="96" type="arm_fpa_ext"/>
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<reg name="f4" bitsize="96" type="arm_fpa_ext"/>
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<reg name="f5" bitsize="96" type="arm_fpa_ext"/>
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<reg name="f6" bitsize="96" type="arm_fpa_ext"/>
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<reg name="f7" bitsize="96" type="arm_fpa_ext"/>
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<reg name="fps" bitsize="32"/>
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</feature>
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</target>
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Run ARM GDB
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~~~~~~~~~~~
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Soon, I should dump this stuff into a .gdbinit file.
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.. code-block:: sh
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arm-none-eabi-gdb -n
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target extended-remote localhost:3333
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set tdesc filename target.xml
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monitor reset init
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monitor mww 0x40043100 0x10000000
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monitor mdw 0x40043100 # Verify 0x0 shadow register is set properly.
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file lpc4350-test.axf # This is an ELF file.
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load # Place image into RAM.
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monitor reset init
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break main # Set a breakpoint.
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continue # Run to breakpoint.
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continue # To continue from the breakpoint.
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step # Step-execute the next source line.
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stepi # Step-execute the next processor instruction.
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info reg # Show processor registers.
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More GDB tips for the GDB-unfamiliar:
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.. code-block:: sh
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# Write the variable "buffer" (an array) to file "buffer.u8".
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dump binary value buffer.u8 buffer
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# Display the first 32 values in buffer whenever you halt
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# execution.
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display/32xh buffer
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# Print the contents of a range of registers (in this case the
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# CGU peripheral, starting at 0x40050014, for 46 words):
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x/46 0x40050014
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And still more, for debugging ARM Cortex-M4 Hard Faults:
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.. code-block :: sh
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# Assuming you have a hard-fault handler wired in:
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display/8xw args
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# Examine fault-related registers:
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# Configurable Fault Status Register (CFSR) contains:
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# CFSR[15:8]: BusFault Status Register (BFSR)
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# "Shows the status of bus errors resulting from instruction
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# prefetches and data accesses."
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# BFSR[7]: BFARVALID: BFSR contents valid.
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# BFSR[5]: LSPERR: fault during FP lazy state preservation.
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# BFSR[4]: STKERR: derived bus fault on exception entry.
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# BFSR[3]: UNSTKERR: derived bus fault on exception return.
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# BFSR[2]: IMPRECISERR: imprecise data access error.
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# BFSR[1]: PRECISERR: precise data access error, faulting
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# address in BFAR.
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# BFSR[0]: IBUSERR: bus fault on instruction prefetch. Occurs
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# only if instruction is issued.
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display/xw 0xE000ED28
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# BusFault Address Register (BFAR)
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# "Shows the address associated with a precise data access fault."
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# "This is the location addressed by an attempted data access that
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# was faulted. The BFSR shows the reason for the fault and whether
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# BFAR_ADDRESS is valid..."
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# "For unaligned access faults, the value returned is the address
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# requested by the instruction. This might not be the address that
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# faulted."
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display/xw 0xE000ED38
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