Add software
This commit is contained in:
RocketGod
@ -0,0 +1,63 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/AT91SAM7/armparams.h
|
||||
* @brief ARM7 AT91SAM7 Specific Parameters.
|
||||
*
|
||||
* @defgroup ARM_AT91SAM7 AT91SAM7 Specific Parameters
|
||||
* @ingroup ARM_SPECIFIC
|
||||
* @details This file contains the ARM specific parameters for the
|
||||
* AT91SAM7 platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _ARMPARAMS_H_
|
||||
#define _ARMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief ARM core model.
|
||||
*/
|
||||
#define ARM_CORE ARM_CORE_ARM7TDMI
|
||||
|
||||
/**
|
||||
* @brief AT91SAM7-specific wait for interrupt.
|
||||
* @details This implementation writes 1 into the PMC_SCDR register.
|
||||
*/
|
||||
#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__)
|
||||
#if ENABLE_WFI_IDLE || defined(__DOXYGEN__)
|
||||
#define port_wait_for_interrupt() { \
|
||||
(*((volatile uint32_t *)0xFFFFFC04)) = 1; \
|
||||
}
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _ARMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,99 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* AT91SAM7A3 memory setup.
|
||||
*/
|
||||
__und_stack_size__ = 0x0004;
|
||||
__abt_stack_size__ = 0x0004;
|
||||
__fiq_stack_size__ = 0x0010;
|
||||
__irq_stack_size__ = 0x0080;
|
||||
__svc_stack_size__ = 0x0004;
|
||||
__sys_stack_size__ = 0x0400;
|
||||
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x100000, len = 256k
|
||||
ram : org = 0x200020, len = 32k - 0x20
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
_text = .;
|
||||
KEEP(*(vectors))
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.ctors)
|
||||
*(.dtors)
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
|
||||
__exidx_end = .;
|
||||
|
||||
.eh_frame_hdr : {*(.eh_frame_hdr)}
|
||||
|
||||
.eh_frame : ONLY_IF_RO {*(.eh_frame)}
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__ - __stacks_total_size__;
|
||||
__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
|
||||
@ -0,0 +1,99 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* AT91SAM7S256 memory setup.
|
||||
*/
|
||||
__und_stack_size__ = 0x0004;
|
||||
__abt_stack_size__ = 0x0004;
|
||||
__fiq_stack_size__ = 0x0010;
|
||||
__irq_stack_size__ = 0x0080;
|
||||
__svc_stack_size__ = 0x0004;
|
||||
__sys_stack_size__ = 0x0400;
|
||||
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x100000, len = 256k
|
||||
ram : org = 0x200020, len = 64k - 0x20
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
_text = .;
|
||||
KEEP(*(vectors))
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.ctors)
|
||||
*(.dtors)
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
|
||||
__exidx_end = .;
|
||||
|
||||
.eh_frame_hdr : {*(.eh_frame_hdr)}
|
||||
|
||||
.eh_frame : ONLY_IF_RO {*(.eh_frame)}
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__ - __stacks_total_size__;
|
||||
__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
|
||||
@ -0,0 +1,99 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* AT91SAM7X256 memory setup.
|
||||
*/
|
||||
__und_stack_size__ = 0x0004;
|
||||
__abt_stack_size__ = 0x0004;
|
||||
__fiq_stack_size__ = 0x0010;
|
||||
__irq_stack_size__ = 0x0080;
|
||||
__svc_stack_size__ = 0x0004;
|
||||
__sys_stack_size__ = 0x0400;
|
||||
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x100000, len = 256k
|
||||
ram : org = 0x200020, len = 64k - 0x20
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
_text = .;
|
||||
KEEP(*(vectors))
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.ctors)
|
||||
*(.dtors)
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
|
||||
__exidx_end = .;
|
||||
|
||||
.eh_frame_hdr : {*(.eh_frame_hdr)}
|
||||
|
||||
.eh_frame : ONLY_IF_RO {*(.eh_frame)}
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__ - __stacks_total_size__;
|
||||
__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
|
||||
@ -0,0 +1,11 @@
|
||||
# List of the ChibiOS/RT ARM7 AT91SAM7 port files.
|
||||
PORTSRC = ${CHIBIOS}/os/ports/GCC/ARM/chcore.c
|
||||
|
||||
PORTASM = ${CHIBIOS}/os/ports/GCC/ARM/crt0.s \
|
||||
${CHIBIOS}/os/ports/GCC/ARM/chcoreasm.s \
|
||||
${CHIBIOS}/os/ports/GCC/ARM/AT91SAM7/vectors.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/GCC/ARM \
|
||||
${CHIBIOS}/os/ports/GCC/ARM/AT91SAM7
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARM/AT91SAM7/ld
|
||||
@ -0,0 +1,111 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/AT91SAM7/vectors.s
|
||||
* @brief Interrupt vectors for the AT91SAM7 family.
|
||||
*
|
||||
* @defgroup ARM_AT91SAM7_VECTORS AT91SAM7 Interrupt Vectors
|
||||
* @ingroup ARM_SPECIFIC
|
||||
* @details Interrupt vectors for the AT91SAM7 family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _unhandled_exception(void) {}
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
.section vectors
|
||||
.code 32
|
||||
.balign 4
|
||||
/*
|
||||
* System entry points.
|
||||
*/
|
||||
_start:
|
||||
ldr pc, _reset
|
||||
ldr pc, _undefined
|
||||
ldr pc, _swi
|
||||
ldr pc, _prefetch
|
||||
ldr pc, _abort
|
||||
nop
|
||||
ldr pc, [pc,#-0xF20] /* AIC - AIC_IVR */
|
||||
ldr pc, [pc,#-0xF20] /* AIC - AIC_FVR */
|
||||
|
||||
_reset:
|
||||
.word ResetHandler /* In crt0.s */
|
||||
_undefined:
|
||||
.word UndHandler
|
||||
_swi:
|
||||
.word SwiHandler
|
||||
_prefetch:
|
||||
.word PrefetchHandler
|
||||
_abort:
|
||||
.word AbortHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
|
||||
.text
|
||||
.code 32
|
||||
.balign 4
|
||||
|
||||
/*
|
||||
* Default exceptions handlers. The handlers are declared weak in order to be
|
||||
* replaced by the real handling code. Everything is defaulted to an infinite
|
||||
* loop.
|
||||
*/
|
||||
.weak UndHandler
|
||||
UndHandler:
|
||||
|
||||
.weak SwiHandler
|
||||
SwiHandler:
|
||||
|
||||
.weak PrefetchHandler
|
||||
PrefetchHandler:
|
||||
|
||||
.weak AbortHandler
|
||||
AbortHandler:
|
||||
|
||||
.weak FiqHandler
|
||||
FiqHandler:
|
||||
|
||||
.global _unhandled_exception
|
||||
_unhandled_exception:
|
||||
b _unhandled_exception
|
||||
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,43 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
#ifndef _WFI_H_
|
||||
#define _WFI_H_
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#ifndef port_wait_for_interrupt
|
||||
#if ENABLE_WFI_IDLE != 0
|
||||
#define port_wait_for_interrupt() { \
|
||||
AT91C_BASE_SYS->PMC_SCDR = AT91C_PMC_PCK; \
|
||||
}
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _WFI_H_ */
|
||||
@ -0,0 +1,63 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/LPC214x/armparams.h
|
||||
* @brief ARM7 LPC214x Specific Parameters.
|
||||
*
|
||||
* @defgroup ARM_LPC214x LPC214x Specific Parameters
|
||||
* @ingroup ARM_SPECIFIC
|
||||
* @details This file contains the ARM specific parameters for the
|
||||
* LPC214x platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _ARMPARAMS_H_
|
||||
#define _ARMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief ARM core model.
|
||||
*/
|
||||
#define ARM_CORE ARM_CORE_ARM7TDMI
|
||||
|
||||
/**
|
||||
* @brief LPC214x-specific wait for interrupt code.
|
||||
* @details This implementation writes 1 into the PCON register.
|
||||
*/
|
||||
#if !defined(port_wait_for_interrupt) || defined(__DOXYGEN__)
|
||||
#if ENABLE_WFI_IDLE || defined(__DOXYGEN__)
|
||||
#define port_wait_for_interrupt() { \
|
||||
(*((volatile uint32_t *)0xE01FC0C0)) = 1; \
|
||||
}
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _ARMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,102 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* LPC2148 memory setup.
|
||||
*/
|
||||
__und_stack_size__ = 0x0004;
|
||||
__abt_stack_size__ = 0x0004;
|
||||
__fiq_stack_size__ = 0x0010;
|
||||
__irq_stack_size__ = 0x0080;
|
||||
__svc_stack_size__ = 0x0004;
|
||||
__sys_stack_size__ = 0x0400;
|
||||
__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 512k - 12k
|
||||
ram : org = 0x40000200, len = 32k - 0x200 - 288
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
__dma_start__ = 0x7FD00000;
|
||||
__dma_size__ = 8k;
|
||||
__dma_end__ = 0x7FD00000 + __dma_size__;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
_text = .;
|
||||
KEEP(*(vectors))
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
*(.ctors)
|
||||
*(.dtors)
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
|
||||
__exidx_end = .;
|
||||
|
||||
.eh_frame_hdr : {*(.eh_frame_hdr)}
|
||||
|
||||
.eh_frame : ONLY_IF_RO {*(.eh_frame)}
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__ - __stacks_total_size__;
|
||||
__main_thread_stack_base__ = __ram_end__ - __stacks_total_size__;
|
||||
@ -0,0 +1,11 @@
|
||||
# List of the ChibiOS/RT ARM7 LPC214x port files.
|
||||
PORTSRC = ${CHIBIOS}/os/ports/GCC/ARM/chcore.c
|
||||
|
||||
PORTASM = ${CHIBIOS}/os/ports/GCC/ARM/crt0.s \
|
||||
${CHIBIOS}/os/ports/GCC/ARM/chcoreasm.s \
|
||||
${CHIBIOS}/os/ports/GCC/ARM/LPC214x/vectors.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/GCC/ARM \
|
||||
${CHIBIOS}/os/ports/GCC/ARM/LPC214x
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARM/LPC214x/ld
|
||||
@ -0,0 +1,108 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/LPC214x/vectors.s
|
||||
* @brief Interrupt vectors for the LPC214x family.
|
||||
*
|
||||
* @defgroup ARM_LPC214x_VECTORS LPC214x Interrupt Vectors
|
||||
* @ingroup ARM_SPECIFIC
|
||||
* @details Interrupt vectors for the LPC214x family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void _unhandled_exception(void) {}
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
.section vectors
|
||||
.code 32
|
||||
.balign 4
|
||||
/*
|
||||
* System entry points.
|
||||
*/
|
||||
_start:
|
||||
ldr pc, _reset
|
||||
ldr pc, _undefined
|
||||
ldr pc, _swi
|
||||
ldr pc, _prefetch
|
||||
ldr pc, _abort
|
||||
nop
|
||||
ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
|
||||
ldr pc, _fiq
|
||||
|
||||
_reset:
|
||||
.word ResetHandler /* In crt0.s */
|
||||
_undefined:
|
||||
.word UndHandler
|
||||
_swi:
|
||||
.word SwiHandler
|
||||
_prefetch:
|
||||
.word PrefetchHandler
|
||||
_abort:
|
||||
.word AbortHandler
|
||||
_fiq:
|
||||
.word FiqHandler
|
||||
.word 0
|
||||
.word 0
|
||||
|
||||
/*
|
||||
* Default exceptions handlers. The handlers are declared weak in order to be
|
||||
* replaced by the real handling code. Everything is defaulted to an infinite
|
||||
* loop.
|
||||
*/
|
||||
.weak UndHandler
|
||||
UndHandler:
|
||||
|
||||
.weak SwiHandler
|
||||
SwiHandler:
|
||||
|
||||
.weak PrefetchHandler
|
||||
PrefetchHandler:
|
||||
|
||||
.weak AbortHandler
|
||||
AbortHandler:
|
||||
|
||||
.weak FiqHandler
|
||||
FiqHandler:
|
||||
|
||||
.global _unhandled_exception
|
||||
_unhandled_exception:
|
||||
b _unhandled_exception
|
||||
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,43 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
#ifndef _WFI_H_
|
||||
#define _WFI_H_
|
||||
|
||||
#include "lpc214x.h"
|
||||
|
||||
#ifndef port_wait_for_interrupt
|
||||
#if ENABLE_WFI_IDLE != 0
|
||||
#define port_wait_for_interrupt() { \
|
||||
PCON = 1; \
|
||||
}
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _WFI_H_ */
|
||||
@ -0,0 +1,51 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/chcore.c
|
||||
* @brief ARM7/9 architecture port code.
|
||||
*
|
||||
* @addtogroup ARM_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* Halts the system.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((weak))
|
||||
#endif
|
||||
void port_halt(void) {
|
||||
|
||||
port_disable();
|
||||
while (TRUE) {
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,485 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/chcore.h
|
||||
* @brief ARM7/9 architecture port macros and structures.
|
||||
*
|
||||
* @addtogroup ARM_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCORE_H_
|
||||
#define _CHCORE_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Core variants identifiers.*/
|
||||
#define ARM_CORE_ARM7TDMI 7 /**< ARM77TDMI core identifier. */
|
||||
#define ARM_CORE_ARM9 9 /**< ARM9 core identifier. */
|
||||
|
||||
/* Inclusion of the ARM implementation specific parameters.*/
|
||||
#include "armparams.h"
|
||||
|
||||
/* ARM core check, only ARM7TDMI and ARM9 supported right now.*/
|
||||
#if (ARM_CORE == ARM_CORE_ARM7TDMI) || (ARM_CORE == ARM_CORE_ARM9)
|
||||
#else
|
||||
#error "unknown or unsupported ARM core"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port statically derived parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port configurable parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief If enabled allows the idle thread to enter a low power mode.
|
||||
*/
|
||||
#ifndef ARM_ENABLE_WFI_IDLE
|
||||
#define ARM_ENABLE_WFI_IDLE FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port exported info. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Macro defining a generic ARM architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_ARM
|
||||
|
||||
#if defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Macro defining the specific ARM architecture.
|
||||
* @note This macro is for documentation only, the real name changes
|
||||
* depending on the selected architecture, the possible names are:
|
||||
* - CH_ARCHITECTURE_ARM7TDMI.
|
||||
* - CH_ARCHITECTURE_ARM9.
|
||||
* .
|
||||
*/
|
||||
#define CH_ARCHITECTURE_ARMx
|
||||
|
||||
/**
|
||||
* @brief Name of the implemented architecture.
|
||||
* @note The value is for documentation only, the real value changes
|
||||
* depending on the selected architecture, the possible values are:
|
||||
* - "ARM7".
|
||||
* - "ARM9".
|
||||
* .
|
||||
*/
|
||||
#define CH_ARCHITECTURE_NAME "ARMx"
|
||||
|
||||
/**
|
||||
* @brief Name of the architecture variant (optional).
|
||||
* @note The value is for documentation only, the real value changes
|
||||
* depending on the selected architecture, the possible values are:
|
||||
* - "ARM7TDMI"
|
||||
* - "ARM9"
|
||||
* .
|
||||
*/
|
||||
#define CH_CORE_VARIANT_NAME "ARMxy"
|
||||
|
||||
/**
|
||||
* @brief Port-specific information string.
|
||||
* @note The value is for documentation only, the real value changes
|
||||
* depending on the selected options, the possible values are:
|
||||
* - "Pure ARM"
|
||||
* - "Pure THUMB"
|
||||
* - "Interworking"
|
||||
* .
|
||||
*/
|
||||
#define CH_PORT_INFO "ARM|THUMB|Interworking"
|
||||
|
||||
#elif ARM_CORE == ARM_CORE_ARM7TDMI
|
||||
#define CH_ARCHITECTURE_ARM7TDMI
|
||||
#define CH_ARCHITECTURE_NAME "ARM7"
|
||||
#define CH_CORE_VARIANT_NAME "ARM7TDMI"
|
||||
|
||||
#elif ARM_MODEL == ARM_VARIANT_ARM9
|
||||
#define CH_ARCHITECTURE_ARM9
|
||||
#define CH_ARCHITECTURE_NAME "ARM9"
|
||||
#define CH_CORE_VARIANT_NAME "ARM9"
|
||||
#endif
|
||||
|
||||
#if THUMB_PRESENT
|
||||
#if THUMB_NO_INTERWORKING
|
||||
#define CH_PORT_INFO "Pure THUMB mode"
|
||||
#else /* !THUMB_NO_INTERWORKING */
|
||||
#define CH_PORT_INFO "Interworking mode"
|
||||
#endif /* !THUMB_NO_INTERWORKING */
|
||||
#else /* !THUMB_PRESENT */
|
||||
#define CH_PORT_INFO "Pure ARM mode"
|
||||
#endif /* !THUMB_PRESENT */
|
||||
|
||||
/**
|
||||
* @brief Name of the compiler supported by this port.
|
||||
*/
|
||||
#define CH_COMPILER_NAME "GCC " __VERSION__
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port implementation part (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief 32 bits stack and memory alignment enforcement.
|
||||
*/
|
||||
typedef uint32_t stkalign_t;
|
||||
|
||||
/**
|
||||
* @brief Generic ARM register.
|
||||
*/
|
||||
typedef void *regarm_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt saved context.
|
||||
* @details This structure represents the stack frame saved during a
|
||||
* preemption-capable interrupt handler.
|
||||
*/
|
||||
struct extctx {
|
||||
regarm_t spsr_irq;
|
||||
regarm_t lr_irq;
|
||||
regarm_t r0;
|
||||
regarm_t r1;
|
||||
regarm_t r2;
|
||||
regarm_t r3;
|
||||
regarm_t r12;
|
||||
regarm_t lr_usr;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief System saved context.
|
||||
* @details This structure represents the inner stack frame during a context
|
||||
* switching.
|
||||
*/
|
||||
struct intctx {
|
||||
regarm_t r4;
|
||||
regarm_t r5;
|
||||
regarm_t r6;
|
||||
regarm_t r7;
|
||||
regarm_t r8;
|
||||
regarm_t r9;
|
||||
regarm_t r10;
|
||||
regarm_t r11;
|
||||
regarm_t lr;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p Thread structure.
|
||||
* @details In this port the structure just holds a pointer to the @p intctx
|
||||
* structure representing the stack pointer at context switch time.
|
||||
*/
|
||||
struct context {
|
||||
struct intctx *r13;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p chThdCreateI() API.
|
||||
* @details This code usually setup the context switching frame represented
|
||||
* by an @p intctx structure.
|
||||
*/
|
||||
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
|
||||
tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
|
||||
wsize - \
|
||||
sizeof(struct intctx)); \
|
||||
tp->p_ctx.r13->r4 = pf; \
|
||||
tp->p_ctx.r13->r5 = arg; \
|
||||
tp->p_ctx.r13->lr = _port_thread_start; \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stack size for the system idle thread.
|
||||
* @details This size depends on the idle thread implementation, usually
|
||||
* the idle thread should take no more space than those reserved
|
||||
* by @p PORT_INT_REQUIRED_STACK.
|
||||
* @note In this port it is set to 4 because the idle thread does have
|
||||
* a stack frame when compiling without optimizations.
|
||||
*/
|
||||
#ifndef PORT_IDLE_THREAD_STACK_SIZE
|
||||
#define PORT_IDLE_THREAD_STACK_SIZE 4
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Per-thread stack overhead for interrupts servicing.
|
||||
* @details This constant is used in the calculation of the correct working
|
||||
* area size.
|
||||
* This value can be zero on those architecture where there is a
|
||||
* separate interrupt stack and the stack space between @p intctx and
|
||||
* @p extctx is known to be zero.
|
||||
* @note In this port 0x10 is a safe value, it can be reduced after careful
|
||||
* analysis of the generated code.
|
||||
*/
|
||||
#ifndef PORT_INT_REQUIRED_STACK
|
||||
#define PORT_INT_REQUIRED_STACK 0x10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enforces a correct alignment for a stack area size value.
|
||||
*/
|
||||
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
|
||||
|
||||
/**
|
||||
* @brief Computes the thread working area global size.
|
||||
*/
|
||||
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
|
||||
sizeof(struct intctx) + \
|
||||
sizeof(struct extctx) + \
|
||||
(n) + (PORT_INT_REQUIRED_STACK))
|
||||
|
||||
/**
|
||||
* @brief Static working area allocation.
|
||||
* @details This macro is used to allocate a static thread working area
|
||||
* aligned as both position and size.
|
||||
*/
|
||||
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
|
||||
|
||||
/**
|
||||
* @brief IRQ prologue code.
|
||||
* @details This macro must be inserted at the start of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
* @note This macro has a different implementation depending if compiled in
|
||||
* ARM or THUMB mode.
|
||||
* @note The THUMB implementation starts with ARM code because interrupt
|
||||
* vectors are always invoked in ARM mode regardless the bit 0
|
||||
* value. The switch in THUMB mode is done in the function prologue so
|
||||
* it is transparent to the user code.
|
||||
*/
|
||||
#if !defined(PORT_IRQ_PROLOGUE)
|
||||
#ifdef THUMB
|
||||
#define PORT_IRQ_PROLOGUE() { \
|
||||
asm volatile (".code 32 \n\t" \
|
||||
"stmfd sp!, {r0-r3, r12, lr} \n\t" \
|
||||
"add r0, pc, #1 \n\t" \
|
||||
"bx r0 \n\t" \
|
||||
".code 16" : : : "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define PORT_IRQ_PROLOGUE() { \
|
||||
asm volatile ("stmfd sp!, {r0-r3, r12, lr}" : : : "memory"); \
|
||||
}
|
||||
#endif /* !THUMB */
|
||||
#endif /* !defined(PORT_IRQ_PROLOGUE) */
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
* @details This macro must be inserted at the end of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
* @note This macro has a different implementation depending if compiled in
|
||||
* ARM or THUMB mode.
|
||||
*/
|
||||
#if !defined(PORT_IRQ_EPILOGUE)
|
||||
#ifdef THUMB
|
||||
#define PORT_IRQ_EPILOGUE() { \
|
||||
asm volatile ("ldr r0, =_port_irq_common \n\t" \
|
||||
"bx r0" : : : "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define PORT_IRQ_EPILOGUE() { \
|
||||
asm volatile ("b _port_irq_common" : : : "memory"); \
|
||||
}
|
||||
#endif /* !THUMB */
|
||||
#endif /* !defined(PORT_IRQ_EPILOGUE) */
|
||||
|
||||
/**
|
||||
* @brief IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#if !defined(PORT_IRQ_HANDLER)
|
||||
#define PORT_IRQ_HANDLER(id) __attribute__((naked)) void id(void)
|
||||
#endif /* !defined(PORT_IRQ_HANDLER) */
|
||||
|
||||
/**
|
||||
* @brief Fast IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#if !defined(PORT_FAST_IRQ_HANDLER)
|
||||
#define PORT_FAST_IRQ_HANDLER(id) \
|
||||
__attribute__((interrupt("FIQ"))) void id(void)
|
||||
#endif /* !defined(PORT_FAST_IRQ_HANDLER) */
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_init()
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action.
|
||||
* @details Usually this function just disables interrupts but may perform
|
||||
* more actions.
|
||||
* @note In this port it disables the IRQ sources and keeps FIQ sources
|
||||
* enabled.
|
||||
*/
|
||||
#ifdef THUMB
|
||||
#define port_lock() { \
|
||||
asm volatile ("bl _port_lock_thumb" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define port_lock() asm volatile ("msr CPSR_c, #0x9F" : : : "memory")
|
||||
#endif /* !THUMB */
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action.
|
||||
* @details Usually this function just enables interrupts but may perform
|
||||
* more actions.
|
||||
* @note In this port it enables both the IRQ and FIQ sources.
|
||||
*/
|
||||
#ifdef THUMB
|
||||
#define port_unlock() { \
|
||||
asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define port_unlock() asm volatile ("msr CPSR_c, #0x1F" : : : "memory")
|
||||
#endif /* !THUMB */
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action from an interrupt handler.
|
||||
* @details This function is invoked before invoking I-class APIs from
|
||||
* interrupt handlers. The implementation is architecture dependent,
|
||||
* in its simplest form it is void.
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define port_lock_from_isr()
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action from an interrupt handler.
|
||||
* @details This function is invoked after invoking I-class APIs from interrupt
|
||||
* handlers. The implementation is architecture dependent, in its
|
||||
* simplest form it is void.
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define port_unlock_from_isr()
|
||||
|
||||
/**
|
||||
* @brief Disables all the interrupt sources.
|
||||
* @note Of course non-maskable interrupt sources are not included.
|
||||
* @note In this port it disables both the IRQ and FIQ sources.
|
||||
* @note Implements a workaround for spurious interrupts taken from the NXP
|
||||
* LPC214x datasheet.
|
||||
*/
|
||||
#ifdef THUMB
|
||||
#define port_disable() { \
|
||||
asm volatile ("bl _port_disable_thumb" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define port_disable() { \
|
||||
asm volatile ("mrs r3, CPSR \n\t" \
|
||||
"orr r3, #0x80 \n\t" \
|
||||
"msr CPSR_c, r3 \n\t" \
|
||||
"orr r3, #0x40 \n\t" \
|
||||
"msr CPSR_c, r3" : : : "r3", "memory"); \
|
||||
}
|
||||
#endif /* !THUMB */
|
||||
|
||||
/**
|
||||
* @brief Disables the interrupt sources below kernel-level priority.
|
||||
* @note Interrupt sources above kernel level remains enabled.
|
||||
* @note In this port it disables the IRQ sources and enables the
|
||||
* FIQ sources.
|
||||
*/
|
||||
#ifdef THUMB
|
||||
#define port_suspend() { \
|
||||
asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define port_suspend() asm volatile ("msr CPSR_c, #0x9F" : : : "memory")
|
||||
#endif /* !THUMB */
|
||||
|
||||
/**
|
||||
* @brief Enables all the interrupt sources.
|
||||
* @note In this port it enables both the IRQ and FIQ sources.
|
||||
*/
|
||||
#ifdef THUMB
|
||||
#define port_enable() { \
|
||||
asm volatile ("bl _port_enable_thumb" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#else /* !THUMB */
|
||||
#define port_enable() asm volatile ("msr CPSR_c, #0x1F" : : : "memory")
|
||||
#endif /* !THUMB */
|
||||
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
* is responsible for the context switch between 2 threads.
|
||||
* @note The implementation of this code affects <b>directly</b> the context
|
||||
* switch performance so optimize here as much as you can.
|
||||
* @note Implemented as inlined code for performance reasons.
|
||||
*
|
||||
* @param[in] ntp the thread to be switched in
|
||||
* @param[in] otp the thread to be switched out
|
||||
*/
|
||||
#ifdef THUMB
|
||||
#if CH_DBG_ENABLE_STACK_CHECK
|
||||
#define port_switch(ntp, otp) { \
|
||||
register struct intctx *r13 asm ("r13"); \
|
||||
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
|
||||
chDbgPanic("stack overflow"); \
|
||||
_port_switch_thumb(ntp, otp); \
|
||||
}
|
||||
#else /* !CH_DBG_ENABLE_STACK_CHECK */
|
||||
#define port_switch(ntp, otp) _port_switch_thumb(ntp, otp)
|
||||
#endif /* !CH_DBG_ENABLE_STACK_CHECK */
|
||||
#else /* !THUMB */
|
||||
#if CH_DBG_ENABLE_STACK_CHECK
|
||||
#define port_switch(ntp, otp) { \
|
||||
register struct intctx *r13 asm ("r13"); \
|
||||
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
|
||||
chDbgPanic("stack overflow"); \
|
||||
_port_switch_arm(ntp, otp); \
|
||||
}
|
||||
#else /* !CH_DBG_ENABLE_STACK_CHECK */
|
||||
#define port_switch(ntp, otp) _port_switch_arm(ntp, otp)
|
||||
#endif /* !CH_DBG_ENABLE_STACK_CHECK */
|
||||
#endif /* !THUMB */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void port_halt(void);
|
||||
#ifdef THUMB
|
||||
void _port_switch_thumb(Thread *ntp, Thread *otp);
|
||||
#else /* !THUMB */
|
||||
void _port_switch_arm(Thread *ntp, Thread *otp);
|
||||
#endif /* !THUMB */
|
||||
void _port_thread_start(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _CHCORE_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,266 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/chcoreasm.s
|
||||
* @brief ARM7/9 architecture port low level code.
|
||||
*
|
||||
* @addtogroup ARM_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "chconf.h"
|
||||
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
.set MODE_USR, 0x10
|
||||
.set MODE_FIQ, 0x11
|
||||
.set MODE_IRQ, 0x12
|
||||
.set MODE_SVC, 0x13
|
||||
.set MODE_ABT, 0x17
|
||||
.set MODE_UND, 0x1B
|
||||
.set MODE_SYS, 0x1F
|
||||
|
||||
.equ I_BIT, 0x80
|
||||
.equ F_BIT, 0x40
|
||||
|
||||
.text
|
||||
|
||||
/*
|
||||
* Interrupt enable/disable functions, only present if there is THUMB code in
|
||||
* the system because those are inlined in ARM code.
|
||||
*/
|
||||
#ifdef THUMB_PRESENT
|
||||
.balign 16
|
||||
.code 16
|
||||
.thumb_func
|
||||
.global _port_disable_thumb
|
||||
_port_disable_thumb:
|
||||
mov r3, pc
|
||||
bx r3
|
||||
.code 32
|
||||
mrs r3, CPSR
|
||||
orr r3, #I_BIT
|
||||
msr CPSR_c, r3
|
||||
orr r3, #F_BIT
|
||||
msr CPSR_c, r3
|
||||
bx lr
|
||||
|
||||
.balign 16
|
||||
.code 16
|
||||
.thumb_func
|
||||
.global _port_suspend_thumb
|
||||
_port_suspend_thumb:
|
||||
.thumb_func
|
||||
.global _port_lock_thumb
|
||||
_port_lock_thumb:
|
||||
mov r3, pc
|
||||
bx r3
|
||||
.code 32
|
||||
msr CPSR_c, #MODE_SYS | I_BIT
|
||||
bx lr
|
||||
|
||||
.balign 16
|
||||
.code 16
|
||||
.thumb_func
|
||||
.global _port_enable_thumb
|
||||
_port_enable_thumb:
|
||||
.thumb_func
|
||||
.global _port_unlock_thumb
|
||||
_port_unlock_thumb:
|
||||
mov r3, pc
|
||||
bx r3
|
||||
.code 32
|
||||
msr CPSR_c, #MODE_SYS
|
||||
bx lr
|
||||
|
||||
#endif
|
||||
|
||||
.balign 16
|
||||
#ifdef THUMB_PRESENT
|
||||
.code 16
|
||||
.thumb_func
|
||||
.global _port_switch_thumb
|
||||
_port_switch_thumb:
|
||||
mov r2, pc
|
||||
bx r2
|
||||
// Jumps into _port_switch_arm in ARM mode
|
||||
#endif
|
||||
.code 32
|
||||
.global _port_switch_arm
|
||||
_port_switch_arm:
|
||||
#ifdef CH_CURRP_REGISTER_CACHE
|
||||
stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
|
||||
str sp, [r1, #12]
|
||||
ldr sp, [r0, #12]
|
||||
#ifdef THUMB_PRESENT
|
||||
ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
|
||||
bx lr
|
||||
#else /* !THUMB_PRESENT */
|
||||
ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
|
||||
#endif /* !THUMB_PRESENT */
|
||||
#else /* !CH_CURRP_REGISTER_CACHE */
|
||||
stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
||||
str sp, [r1, #12]
|
||||
ldr sp, [r0, #12]
|
||||
#ifdef THUMB_PRESENT
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
|
||||
bx lr
|
||||
#else /* !THUMB_PRESENT */
|
||||
ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
|
||||
#endif /* !THUMB_PRESENT */
|
||||
#endif /* !CH_CURRP_REGISTER_CACHE */
|
||||
|
||||
/*
|
||||
* Common exit point for all IRQ routines, it performs the rescheduling if
|
||||
* required.
|
||||
* System stack frame structure after a context switch in the
|
||||
* interrupt handler:
|
||||
*
|
||||
* High +------------+
|
||||
* | LR_USR | -+
|
||||
* | R12 | |
|
||||
* | R3 | |
|
||||
* | R2 | | External context: IRQ handler frame
|
||||
* | R1 | |
|
||||
* | R0 | |
|
||||
* | PC | | (user code return address)
|
||||
* | PSR_USR | -+ (user code status)
|
||||
* | .... | <- chSchDoReschedule() stack frame, optimize it for space
|
||||
* | LR | -+ (system code return address)
|
||||
* | R11 | |
|
||||
* | R10 | |
|
||||
* | R9 | |
|
||||
* | R8 | | Internal context: chSysSwitch() frame
|
||||
* | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
|
||||
* | R6 | |
|
||||
* | R5 | |
|
||||
* SP-> | R4 | -+
|
||||
* Low +------------+
|
||||
*/
|
||||
.balign 16
|
||||
#ifdef THUMB_NO_INTERWORKING
|
||||
.code 16
|
||||
.thumb_func
|
||||
.globl _port_irq_common
|
||||
_port_irq_common:
|
||||
bl chSchIsPreemptionRequired
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else /* !THUMB_NO_INTERWORKING */
|
||||
.code 32
|
||||
.globl _port_irq_common
|
||||
_port_irq_common:
|
||||
bl chSchIsPreemptionRequired
|
||||
#endif /* !THUMB_NO_INTERWORKING */
|
||||
cmp r0, #0 // Simply returns if a
|
||||
ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
|
||||
subeqs pc, lr, #4 // required.
|
||||
|
||||
// Saves the IRQ mode registers in the system stack.
|
||||
ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
|
||||
msr CPSR_c, #MODE_SYS | I_BIT
|
||||
stmfd sp!, {r0-r3, r12, lr} // Registers on System Stack.
|
||||
msr CPSR_c, #MODE_IRQ | I_BIT
|
||||
mrs r0, SPSR
|
||||
mov r1, lr
|
||||
msr CPSR_c, #MODE_SYS | I_BIT
|
||||
stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
|
||||
|
||||
// Context switch.
|
||||
#ifdef THUMB_NO_INTERWORKING
|
||||
add r0, pc, #1
|
||||
bx r0
|
||||
.code 16
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK
|
||||
bl dbg_check_lock
|
||||
#endif
|
||||
bl chSchDoReschedule
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK
|
||||
bl dbg_check_unlock
|
||||
#endif
|
||||
mov lr, pc
|
||||
bx lr
|
||||
.code 32
|
||||
#else /* !THUMB_NO_INTERWORKING */
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK
|
||||
bl dbg_check_lock
|
||||
#endif
|
||||
bl chSchDoReschedule
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK
|
||||
bl dbg_check_unlock
|
||||
#endif
|
||||
#endif /* !THUMB_NO_INTERWORKING */
|
||||
|
||||
// Re-establish the IRQ conditions again.
|
||||
ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
|
||||
msr CPSR_c, #MODE_IRQ | I_BIT
|
||||
msr SPSR_fsxc, r0
|
||||
mov lr, r1
|
||||
msr CPSR_c, #MODE_SYS | I_BIT
|
||||
ldmfd sp!, {r0-r3, r12, lr}
|
||||
msr CPSR_c, #MODE_IRQ | I_BIT
|
||||
subs pc, lr, #4
|
||||
|
||||
/*
|
||||
* Threads trampoline code.
|
||||
* NOTE: The threads always start in ARM mode and then switches to the
|
||||
* thread-function mode.
|
||||
*/
|
||||
.balign 16
|
||||
.code 32
|
||||
.globl _port_thread_start
|
||||
_port_thread_start:
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK
|
||||
mov r0, #0
|
||||
ldr r1, =dbg_lock_cnt
|
||||
str r0, [r1]
|
||||
#endif
|
||||
msr CPSR_c, #MODE_SYS
|
||||
#ifndef THUMB_NO_INTERWORKING
|
||||
mov r0, r5
|
||||
mov lr, pc
|
||||
bx r4
|
||||
bl chThdExit
|
||||
#else /* !THUMB_NO_INTERWORKING */
|
||||
add r0, pc, #1
|
||||
bx r0
|
||||
.code 16
|
||||
mov r0, r5
|
||||
bl jmpr4
|
||||
bl chThdExit
|
||||
jmpr4:
|
||||
bx r4
|
||||
#endif /* !THUMB_NO_INTERWORKING */
|
||||
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,87 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/chtypes.h
|
||||
* @brief ARM7/9 architecture port system types.
|
||||
*
|
||||
* @addtogroup ARM_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHTYPES_H_
|
||||
#define _CHTYPES_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
typedef bool bool_t; /**< Fast boolean type. */
|
||||
typedef uint8_t tmode_t; /**< Thread flags. */
|
||||
typedef uint8_t tstate_t; /**< Thread state. */
|
||||
typedef uint8_t trefs_t; /**< Thread references counter. */
|
||||
typedef uint8_t tslices_t; /**< Thread time slices counter. */
|
||||
typedef uint32_t tprio_t; /**< Thread priority. */
|
||||
typedef int32_t msg_t; /**< Inter-thread message. */
|
||||
typedef int32_t eventid_t; /**< Event Id. */
|
||||
typedef uint32_t eventmask_t; /**< Event mask. */
|
||||
typedef uint32_t flagsmask_t; /**< Event flags. */
|
||||
typedef uint32_t systime_t; /**< System time. */
|
||||
typedef int32_t cnt_t; /**< Resources counter. */
|
||||
|
||||
/**
|
||||
* @brief Inline function modifier.
|
||||
*/
|
||||
#define INLINE inline
|
||||
|
||||
/**
|
||||
* @brief ROM constant modifier.
|
||||
* @note It is set to use the "const" keyword in this port.
|
||||
*/
|
||||
#define ROMCONST const
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (within).
|
||||
* @note It uses the "packed" GCC attribute.
|
||||
*/
|
||||
#define PACK_STRUCT_STRUCT __attribute__((packed))
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (before).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_BEGIN
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (after).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_END
|
||||
|
||||
#endif /* _CHTYPES_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,169 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARM/crt0.s
|
||||
* @brief Generic ARM7/9 startup file for ChibiOS/RT.
|
||||
*
|
||||
* @addtogroup ARM_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
.set MODE_USR, 0x10
|
||||
.set MODE_FIQ, 0x11
|
||||
.set MODE_IRQ, 0x12
|
||||
.set MODE_SVC, 0x13
|
||||
.set MODE_ABT, 0x17
|
||||
.set MODE_UND, 0x1B
|
||||
.set MODE_SYS, 0x1F
|
||||
|
||||
.set I_BIT, 0x80
|
||||
.set F_BIT, 0x40
|
||||
|
||||
.text
|
||||
.code 32
|
||||
.balign 4
|
||||
|
||||
/*
|
||||
* Reset handler.
|
||||
*/
|
||||
.global ResetHandler
|
||||
ResetHandler:
|
||||
/*
|
||||
* Stack pointers initialization.
|
||||
*/
|
||||
ldr r0, =__ram_end__
|
||||
/* Undefined */
|
||||
msr CPSR_c, #MODE_UND | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
ldr r1, =__und_stack_size__
|
||||
sub r0, r0, r1
|
||||
/* Abort */
|
||||
msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
ldr r1, =__abt_stack_size__
|
||||
sub r0, r0, r1
|
||||
/* FIQ */
|
||||
msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
ldr r1, =__fiq_stack_size__
|
||||
sub r0, r0, r1
|
||||
/* IRQ */
|
||||
msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
ldr r1, =__irq_stack_size__
|
||||
sub r0, r0, r1
|
||||
/* Supervisor */
|
||||
msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
ldr r1, =__svc_stack_size__
|
||||
sub r0, r0, r1
|
||||
/* System */
|
||||
msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
|
||||
mov sp, r0
|
||||
// ldr r1, =__sys_stack_size__
|
||||
// sub r0, r0, r1
|
||||
/*
|
||||
* Early initialization.
|
||||
*/
|
||||
#ifndef THUMB_NO_INTERWORKING
|
||||
bl __early_init
|
||||
#else
|
||||
add r0, pc, #1
|
||||
bx r0
|
||||
.code 16
|
||||
bl __early_init
|
||||
mov r0, pc
|
||||
bx r0
|
||||
.code 32
|
||||
#endif
|
||||
/*
|
||||
* Data initialization.
|
||||
* NOTE: It assumes that the DATA size is a multiple of 4.
|
||||
*/
|
||||
ldr r1, =_textdata
|
||||
ldr r2, =_data
|
||||
ldr r3, =_edata
|
||||
dataloop:
|
||||
cmp r2, r3
|
||||
ldrlo r0, [r1], #4
|
||||
strlo r0, [r2], #4
|
||||
blo dataloop
|
||||
/*
|
||||
* BSS initialization.
|
||||
* NOTE: It assumes that the BSS size is a multiple of 4.
|
||||
*/
|
||||
mov r0, #0
|
||||
ldr r1, =_bss_start
|
||||
ldr r2, =_bss_end
|
||||
bssloop:
|
||||
cmp r1, r2
|
||||
strlo r0, [r1], #4
|
||||
blo bssloop
|
||||
/*
|
||||
* Main program invocation.
|
||||
*/
|
||||
#ifdef THUMB_NO_INTERWORKING
|
||||
add r0, pc, #1
|
||||
bx r0
|
||||
.code 16
|
||||
bl main
|
||||
ldr r1, =_main_exit_handler
|
||||
bx r1
|
||||
.code 32
|
||||
#else
|
||||
bl main
|
||||
b _main_exit_handler
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Default main function exit handler.
|
||||
*/
|
||||
.weak _main_exit_handler
|
||||
.global _main_exit_handler
|
||||
_main_exit_handler:
|
||||
.loop: b .loop
|
||||
|
||||
/*
|
||||
* Default early initialization code. It is declared weak in order to be
|
||||
* replaced by the real initialization code.
|
||||
* Early initialization is performed just after reset before BSS and DATA
|
||||
* segments initialization.
|
||||
*/
|
||||
#ifdef THUMB_NO_INTERWORKING
|
||||
.thumb_func
|
||||
.code 16
|
||||
#endif
|
||||
.weak __early_init
|
||||
hwinit0:
|
||||
bx lr
|
||||
.code 32
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,233 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARM ARM7/9
|
||||
* @details ARM7/9 port for the GCC compiler.
|
||||
*
|
||||
* @section ARM_INTRO Introduction
|
||||
* The ARM7/9-GCC port supports the ARM7/9 core in the following three modes:
|
||||
* - <b>Pure ARM</b> mode, this is the preferred mode for code speed, this
|
||||
* mode increases the memory footprint however. This mode is enabled when
|
||||
* all the modules are compiled in ARM mode, see the Makefiles.
|
||||
* - <b>Pure THUMB</b> mode, this is the preferred mode for code size. In
|
||||
* this mode the execution speed is slower than the ARM mode. This mode
|
||||
* is enabled when all the modules are compiled in THUMB mode, see the
|
||||
* Makefiles.
|
||||
* - <b>Interworking</b> mode, when in the system there are ARM modules mixed
|
||||
* with THUMB modules then the interworking compiler option is enabled.
|
||||
* This is usually the slowest mode and the code size is not as good as
|
||||
* in pure THUMB mode.
|
||||
* .
|
||||
* @section ARM_STATES Mapping of the System States in the ARM7/9 port
|
||||
* The ChibiOS/RT logical system states are mapped as follow in the ARM7/9
|
||||
* port:
|
||||
* - <b>Init</b>. This state is represented by the startup code and the
|
||||
* initialization code before @p chSysInit() is executed. It has not a
|
||||
* special hardware state associated, usually the CPU goes through several
|
||||
* hardware states during the startup phase.
|
||||
* - <b>Normal</b>. This is the state the system has after executing
|
||||
* @p chSysInit(). In this state the CPU has both the interrupt sources
|
||||
* (IRQ and FIQ) enabled and is running in ARM System Mode.
|
||||
* - <b>Suspended</b>. In this state the IRQ sources are disabled but the FIQ
|
||||
* sources are served, the core is running in ARM System Mode.
|
||||
* - <b>Disabled</b>. Both the IRQ and FIQ sources are disabled, the core is
|
||||
* running in ARM System Mode.
|
||||
* - <b>Sleep</b>. ARM7/9 cores does not have an explicit built-in low power
|
||||
* mode but there are clock stop modes implemented in custom ways by the
|
||||
* various silicon vendors. This state is implemented in each microcontroller
|
||||
* support code in a different way, the core is running (or freezed...)
|
||||
* in ARM System Mode.
|
||||
* - <b>S-Locked</b>. IRQ sources disabled, core running in ARM System Mode.
|
||||
* - <b>I-Locked</b>. IRQ sources disabled, core running in ARM IRQ Mode. Note
|
||||
* that this state is not different from the SRI state in this port, the
|
||||
* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
|
||||
* order to formally change state because this may change).
|
||||
* - <b>Serving Regular Interrupt</b>. IRQ sources disabled, core running in
|
||||
* ARM IRQ Mode. See also the I-Locked state.
|
||||
* - <b>Serving Fast Interrupt</b>. IRQ and FIQ sources disabled, core running
|
||||
* in ARM FIQ Mode.
|
||||
* - <b>Serving Non-Maskable Interrupt</b>. There are no asynchronous NMI
|
||||
* sources in ARM7/9 architecture but synchronous SVC, ABT and UND exception
|
||||
* handlers can be seen as belonging to this category.
|
||||
* - <b>Halted</b>. Implemented as an infinite loop after disabling both IRQ
|
||||
* and FIQ sources. The ARM state is whatever the processor was running when
|
||||
* @p chSysHalt() was invoked.
|
||||
* .
|
||||
* @section ARM_NOTES The ARM7/9 port notes
|
||||
* The ARM7/9 port is organized as follow:
|
||||
* - The @p main() function is invoked in system mode.
|
||||
* - Each thread has a private user/system stack, the system has a single
|
||||
* interrupt stack where all the interrupts are processed.
|
||||
* - The threads are started in system mode.
|
||||
* - The threads code can run in system mode or user mode, however the
|
||||
* code running in user mode cannot invoke the ChibiOS/RT APIs directly
|
||||
* because privileged instructions are used inside.<br>
|
||||
* The kernel APIs can be eventually invoked by using a SWI entry point
|
||||
* that handles the switch in system mode and the return in user mode.
|
||||
* - Other modes are not preempt-able because the system code assumes the
|
||||
* threads running in system mode. When running in supervisor or other
|
||||
* modes make sure that the interrupts are globally disabled.
|
||||
* - Interrupts nesting is not supported in the ARM7/9 port because their
|
||||
* implementation, even if possible, is not really efficient in this
|
||||
* architecture.
|
||||
* - FIQ sources can preempt the kernel (by design) so it is not possible to
|
||||
* invoke the kernel APIs from inside a FIQ handler. FIQ handlers are not
|
||||
* affected by the kernel activity so there is not added jitter.
|
||||
* .
|
||||
* @section ARM_IH ARM7/9 Interrupt Handlers
|
||||
* In the current implementation the ARM7/9 Interrupt handlers do not save
|
||||
* function-saved registers so you need to make sure your code saves them
|
||||
* or does not use them (this happens because in the ARM7/9 port all the
|
||||
* OS interrupt handler functions are declared naked).<br>
|
||||
* Function-trashed registers (R0-R3, R12, LR, SR) are saved/restored by the
|
||||
* system macros @p CH_IRQ_PROLOGUE() and @p CH_IRQ_EPILOGUE().<br>
|
||||
* The easiest way to ensure this is to just invoke a normal function from
|
||||
* within the interrupt handler, the function code will save all the required
|
||||
* registers.<br>
|
||||
* Example:
|
||||
* @code
|
||||
* CH_IRQ_HANDLER(irq_handler) {
|
||||
* CH_IRQ_PROLOGUE();
|
||||
*
|
||||
* serve_interrupt();
|
||||
*
|
||||
* VICVectAddr = 0; // This is LPC214x-specific.
|
||||
* CH_IRQ_EPILOGUE();
|
||||
* }
|
||||
* @endcode
|
||||
* This is not a bug but an implementation choice, this solution allows to
|
||||
* have interrupt handlers compiled in thumb mode without have to use an
|
||||
* interworking mode (the mode switch is hidden in the macros), this
|
||||
* greatly improves code efficiency and size. You can look at the serial
|
||||
* driver for real examples of interrupt handlers.<br>
|
||||
* It is important that the serve_interrupt() interrupt function is not
|
||||
* inlined by the compiler into the ISR or the code could still modify
|
||||
* the unsaved registers, this can be accomplished using GCC by adding
|
||||
* the attribute "noinline" to the function:
|
||||
* @code
|
||||
* #if defined(__GNUC__)
|
||||
* __attribute__((noinline))
|
||||
* #endif
|
||||
* static void serve_interrupt(void) {
|
||||
* }
|
||||
* @endcode
|
||||
* Note that several commercial compilers support a GNU-like functions
|
||||
* attribute mechanism.<br>
|
||||
* Alternative ways are to use an appropriate pragma directive or disable
|
||||
* inlining optimizations in the modules containing the interrupt handlers.
|
||||
*
|
||||
* @ingroup gcc
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARM_CONF Configuration Options
|
||||
* @details ARM7/9 specific configuration options. The ARM7/9 port allows some
|
||||
* architecture-specific configurations settings that can be overridden by
|
||||
* redefining them in @p chconf.h. Usually there is no need to change the
|
||||
* default values.
|
||||
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
|
||||
* by an interrupt handler between the @p extctx and @p intctx
|
||||
* structures.<br>
|
||||
* In practice this value is the stack space used by the chSchDoReschedule()
|
||||
* stack frame.<br>
|
||||
* This value can be affected by a variety of external things like compiler
|
||||
* version, compiler options, kernel settings (speed/size) and so on.<br>
|
||||
* The default for this value is @p 0x10 which should be a safe value, you
|
||||
* can trim this down by defining the macro externally. This would save
|
||||
* some valuable RAM space for each thread present in the system.<br>
|
||||
* The default value is set into <b>./os/ports/GCC/ARM/chcore.h</b>.
|
||||
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
||||
* thread. Usually there is no need to change this value unless inserting
|
||||
* code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
|
||||
* - @p ARM_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
|
||||
* an implementation-specific clock stop mode from within the idle loop.
|
||||
* This option is defaulted to FALSE because it can create problems with
|
||||
* some debuggers. Setting this option to TRUE reduces the system power
|
||||
* requirements.
|
||||
* .
|
||||
* @ingroup ARM
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARM_CORE Core Port Implementation
|
||||
* @details ARM7/9 specific port code, structures and macros.
|
||||
*
|
||||
* @ingroup ARM
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARM_STARTUP Startup Support
|
||||
* @details ARM7/9 startup code support. ChibiOS/RT provides its own generic
|
||||
* startup file for the ARM7/9 port. Of course it is not mandatory to use it
|
||||
* but care should be taken about the startup phase details.
|
||||
*
|
||||
* @section ARM_STARTUP_1 Startup Process
|
||||
* The startup process, as implemented, is the following:
|
||||
* -# The stacks are initialized by assigning them the sizes defined in the
|
||||
* linker script (usually named @p ch.ld). Stack areas are allocated from
|
||||
* the highest RAM location downward.
|
||||
* -# The ARM state is switched to System with both IRQ and FIQ sources
|
||||
* disabled.
|
||||
* -# An early initialization routine @p hwinit0 is invoked, if the symbol is
|
||||
* not defined then an empty default routine is executed (weak symbol).
|
||||
* -# DATA and BSS segments are initialized.
|
||||
* -# A late initialization routine @p hwinit1 is invoked, if the symbol not
|
||||
* defined then an empty default routine is executed (weak symbol).<br>
|
||||
* This late initialization function is also the proper place for a
|
||||
* @a bootloader, if your application requires one.
|
||||
* -# The @p main() function is invoked with the parameters @p argc and @p argv
|
||||
* set to zero.
|
||||
* -# Should the @p main() function return a branch is performed to the weak
|
||||
* symbol _main_exit_handler. The default code is an endless empty loop.
|
||||
* .
|
||||
* @section ARM_STARTUP_2 Expected linker symbols
|
||||
* The startup code starts at the symbol @p ResetHandler and expects the
|
||||
* following symbols to be defined in the linker script:
|
||||
* - @p __ram_end__ RAM end location +1.
|
||||
* - @p __und_stack_size__ Undefined Instruction stack size.
|
||||
* - @p __abt_stack_size__ Memory Abort stack size.
|
||||
* - @p __fiq_stack_size__ FIQ service stack size.
|
||||
* - @p __irq_stack_size__ IRQ service stack size.
|
||||
* - @p __svc_stack_size__ SVC service stack size.
|
||||
* - @p __sys_stack_size__ System/User stack size. This is the stack area used
|
||||
* by the @p main() function.
|
||||
* - @p _textdata address of the data segment source read only data.
|
||||
* - @p _data data segment start location.
|
||||
* - @p _edata data segment end location +1.
|
||||
* - @p _bss_start BSS start location.
|
||||
* - @p _bss_end BSS end location +1.
|
||||
* .
|
||||
* @ingroup ARM
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARM_SPECIFIC Specific Implementations
|
||||
* @details Platform-specific port code.
|
||||
*
|
||||
* @ingroup ARM
|
||||
*/
|
||||
@ -0,0 +1,221 @@
|
||||
# ARM7/9 common makefile scripts and rules.
|
||||
|
||||
# Output directory and files
|
||||
ifeq ($(BUILDDIR),)
|
||||
BUILDDIR = build
|
||||
endif
|
||||
ifeq ($(BUILDDIR),.)
|
||||
BUILDDIR = build
|
||||
endif
|
||||
OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
|
||||
$(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp
|
||||
|
||||
# Automatic compiler options
|
||||
OPT = $(USE_OPT)
|
||||
COPT = $(USE_COPT)
|
||||
CPPOPT = $(USE_CPPOPT)
|
||||
ifeq ($(USE_LINK_GC),yes)
|
||||
OPT += -ffunction-sections -fdata-sections
|
||||
endif
|
||||
|
||||
# Source files groups and paths
|
||||
ifeq ($(USE_THUMB),yes)
|
||||
TCSRC += $(CSRC)
|
||||
TCPPSRC += $(CPPSRC)
|
||||
else
|
||||
ACSRC += $(CSRC)
|
||||
ACPPSRC += $(CPPSRC)
|
||||
endif
|
||||
ASRC = $(ACSRC)$(ACPPSRC)
|
||||
TSRC = $(TCSRC)$(TCPPSRC)
|
||||
SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
|
||||
|
||||
# Various directories
|
||||
OBJDIR = $(BUILDDIR)/obj
|
||||
LSTDIR = $(BUILDDIR)/lst
|
||||
|
||||
# Object files groups
|
||||
ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
|
||||
ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
|
||||
TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
|
||||
TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
|
||||
ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
|
||||
ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
|
||||
OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
|
||||
|
||||
# Paths
|
||||
IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
|
||||
LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
|
||||
|
||||
# Macros
|
||||
DEFS = $(DDEFS) $(UDEFS)
|
||||
ADEFS = $(DADEFS) $(UADEFS)
|
||||
|
||||
# Libs
|
||||
LIBS = $(DLIBS) $(ULIBS)
|
||||
|
||||
# Various settings
|
||||
MCFLAGS = -mcpu=$(MCU)
|
||||
ODFLAGS = -x --syms
|
||||
ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
|
||||
ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
|
||||
CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
|
||||
CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
|
||||
ifeq ($(USE_LINK_GC),yes)
|
||||
LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)
|
||||
else
|
||||
LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)
|
||||
endif
|
||||
|
||||
# Thumb interwork enabled only if needed because it kills performance.
|
||||
ifneq ($(TSRC),)
|
||||
CFLAGS += -DTHUMB_PRESENT
|
||||
CPPFLAGS += -DTHUMB_PRESENT
|
||||
ASFLAGS += -DTHUMB_PRESENT
|
||||
ifneq ($(ASRC),)
|
||||
# Mixed ARM and THUMB mode.
|
||||
CFLAGS += -mthumb-interwork
|
||||
CPPFLAGS += -mthumb-interwork
|
||||
ASFLAGS += -mthumb-interwork
|
||||
LDFLAGS += -mthumb-interwork
|
||||
else
|
||||
# Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
|
||||
CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
|
||||
CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
|
||||
ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
|
||||
LDFLAGS += -mno-thumb-interwork -mthumb
|
||||
endif
|
||||
else
|
||||
# Pure ARM mode
|
||||
CFLAGS += -mno-thumb-interwork
|
||||
CPPFLAGS += -mno-thumb-interwork
|
||||
ASFLAGS += -mno-thumb-interwork
|
||||
LDFLAGS += -mno-thumb-interwork
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
ASFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
CFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
CPPFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
|
||||
# Paths where to search for sources
|
||||
VPATH = $(SRCPATHS)
|
||||
|
||||
#
|
||||
# Makefile rules
|
||||
#
|
||||
|
||||
all: $(OBJS) $(OUTFILES) MAKE_ALL_RULE_HOOK
|
||||
|
||||
MAKE_ALL_RULE_HOOK:
|
||||
|
||||
$(OBJS): | $(BUILDDIR)
|
||||
|
||||
$(BUILDDIR) $(OBJDIR) $(LSTDIR):
|
||||
ifneq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo Compiler Options
|
||||
@echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
|
||||
@echo
|
||||
endif
|
||||
mkdir -p $(OBJDIR)
|
||||
mkdir -p $(LSTDIR)
|
||||
|
||||
$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $<
|
||||
@$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $<
|
||||
@$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $<
|
||||
@$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $<
|
||||
@$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $<
|
||||
@$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $<
|
||||
@$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
%.elf: $(OBJS) $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
|
||||
else
|
||||
@echo Linking $@
|
||||
@$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
|
||||
endif
|
||||
|
||||
%.hex: %.elf $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
$(HEX) $< $@
|
||||
else
|
||||
@echo Creating $@
|
||||
@$(HEX) $< $@
|
||||
endif
|
||||
|
||||
%.bin: %.elf $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
$(BIN) $< $@
|
||||
else
|
||||
@echo Creating $@
|
||||
@$(BIN) $< $@
|
||||
endif
|
||||
|
||||
%.dmp: %.elf $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
$(OD) $(ODFLAGS) $< > $@
|
||||
else
|
||||
@echo Creating $@
|
||||
@$(OD) $(ODFLAGS) $< > $@
|
||||
@echo Done
|
||||
endif
|
||||
|
||||
clean:
|
||||
@echo Cleaning
|
||||
-rm -fR .dep $(BUILDDIR)
|
||||
@echo Done
|
||||
|
||||
#
|
||||
# Include the dependency files, should be the last of the makefile
|
||||
#
|
||||
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
|
||||
|
||||
# *** EOF ***
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC11xx/cmparams.h
|
||||
* @brief ARM Cortex-M0 parameters for the LPC11xx.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC11xx LPC11xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M0 specific parameters for the
|
||||
* LPC11xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M0
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 2
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* LPC1114 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0200;
|
||||
__process_stack_size__ = 0x0200;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 32k
|
||||
ram : org = 0x10000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,146 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* LPC11U14 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0100;
|
||||
__process_stack_size__ = 0x0200;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 32k
|
||||
ram : org = 0x10000000, len = 4k
|
||||
usbram : org = 0x20004000, len = 2k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M0 LPC11xx port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC11xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC11xx/ld
|
||||
@ -0,0 +1,205 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC11xx/vectors.c
|
||||
* @brief Interrupt vectors for the LPC11xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC11xx_VECTORS LPC11xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the LPC11xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[32];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief LPC11xx vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC13xx/cmparams.h
|
||||
* @brief ARM Cortex-M0 LPC122x Specific Parameters.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC122x LPC122x Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M0 specific parameters for the
|
||||
* LPC122x platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M0
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 2
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* LPC1227 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0200;
|
||||
__process_stack_size__ = 0x0200;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 128k
|
||||
ram : org = 0x10000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M0 LPC122x port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC122x
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC122x/ld
|
||||
@ -0,0 +1,205 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC122x/vectors.c
|
||||
* @brief Interrupt vectors for the LPC122x family.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC122x_VECTORS LPC122x Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the LPC122x family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[32];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief LPC11xx vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC13xx/cmparams.h
|
||||
* @brief ARM Cortex-M3 LPC13xx Specific Parameters.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC13xx LPC13xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M3 specific parameters for the
|
||||
* LPC13xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M3
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 3
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* LPC1343 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0200;
|
||||
__process_stack_size__ = 0x0200;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 32k
|
||||
ram : org = 0x10000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M0 LPC13xx port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC13xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC13xx/ld
|
||||
@ -0,0 +1,264 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC13xx/vectors.c
|
||||
* @brief Interrupt vectors for the LPC13xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC13xx_VECTORS LPC13xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the LPC13xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[58];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
extern void VectorC0(void);
|
||||
extern void VectorC4(void);
|
||||
extern void VectorC8(void);
|
||||
extern void VectorCC(void);
|
||||
extern void VectorD0(void);
|
||||
extern void VectorD4(void);
|
||||
extern void VectorD8(void);
|
||||
extern void VectorDC(void);
|
||||
extern void VectorE0(void);
|
||||
extern void VectorE4(void);
|
||||
extern void VectorE8(void);
|
||||
extern void VectorEC(void);
|
||||
extern void VectorF0(void);
|
||||
extern void VectorF4(void);
|
||||
extern void VectorF8(void);
|
||||
extern void VectorFC(void);
|
||||
extern void Vector100(void);
|
||||
extern void Vector104(void);
|
||||
extern void Vector108(void);
|
||||
extern void Vector10C(void);
|
||||
extern void Vector110(void);
|
||||
extern void Vector114(void);
|
||||
extern void Vector118(void);
|
||||
extern void Vector11C(void);
|
||||
extern void Vector120(void);
|
||||
extern void Vector124(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief LPC13xx vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC,
|
||||
VectorC0, VectorC4, VectorC8, VectorCC,
|
||||
VectorD0, VectorD4, VectorD8, VectorDC,
|
||||
VectorE0, VectorE4, VectorE8, VectorEC,
|
||||
VectorF0, VectorF4, VectorF8, VectorFC,
|
||||
Vector100, Vector104, Vector108, Vector10C,
|
||||
Vector110, Vector114, Vector118, Vector11C,
|
||||
Vector120, Vector124
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,67 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC8xx/cmparams.h
|
||||
* @brief ARM Cortex-M0+ parameters for the LPC8xx.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC8xx LPC8xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M0+ specific parameters for the
|
||||
* LPC8xx platform.
|
||||
* (Taken from the device header file where possible)
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
#include "LPC8xx.h"
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL __CORTEX_M
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU __MPU_PRESENT
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS __NVIC_PRIO_BITS
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* LPC812 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0100;
|
||||
__process_stack_size__ = 0x0100;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 16k
|
||||
ram : org = 0x10000000, len = 4k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M0 LPC8xx port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/LPC8xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC8xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/LPC8xx/ld
|
||||
@ -0,0 +1,206 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/LPC8xx/vectors.c
|
||||
* @brief Interrupt vectors for the LPC8xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_LPC8xx_VECTORS LPC8xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the LPC8xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[32];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void Vector10(void);
|
||||
extern void Vector14(void);
|
||||
extern void Vector18(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void Vector30(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief LPC8xx vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
Vector10, Vector14, Vector18, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
Vector30, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector10(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector14(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector18(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector30(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/SAM4L/cmparams.h
|
||||
* @brief ARM Cortex-M4 parameters for the ATSAM4L.
|
||||
*
|
||||
* @defgroup ARMCMx_SAM4L ATSAM4L Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M4 specific parameters for the
|
||||
* ATSAM4L platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M4
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,146 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ATSAM4LC4C memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x00000000, len = 256k
|
||||
ram : org = 0x20000000, len = 32k
|
||||
ram2 : org = 0x21000000, len = 2k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M4 STM32 port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/SAM4L/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/SAM4L
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/SAM4L/ld
|
||||
@ -0,0 +1,313 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/SAM4L/vectors.c
|
||||
* @brief Interrupt vectors for the ATSAM4L family.
|
||||
*
|
||||
* @defgroup ARMCMx_SAM4L_VECTORS ATSAM4L Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the ATSAM4L family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[80];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void HFLASHC_Handler(void);
|
||||
extern void PDCA_0_Handler(void);
|
||||
extern void PDCA_1_Handler(void);
|
||||
extern void PDCA_2_Handler(void);
|
||||
extern void PDCA_3_Handler(void);
|
||||
extern void PDCA_4_Handler(void);
|
||||
extern void PDCA_5_Handler(void);
|
||||
extern void PDCA_6_Handler(void);
|
||||
extern void PDCA_7_Handler(void);
|
||||
extern void PDCA_8_Handler(void);
|
||||
extern void PDCA_9_Handler(void);
|
||||
extern void PDCA_10_Handler(void);
|
||||
extern void PDCA_11_Handler(void);
|
||||
extern void PDCA_12_Handler(void);
|
||||
extern void PDCA_13_Handler(void);
|
||||
extern void PDCA_14_Handler(void);
|
||||
extern void PDCA_15_Handler(void);
|
||||
extern void CRCCU_Handler(void);
|
||||
extern void USBC_Handler(void);
|
||||
extern void PEVC_TR_Handler(void);
|
||||
extern void PEVC_OV_Handler(void);
|
||||
extern void AESA_Handler(void);
|
||||
extern void PM_Handler(void);
|
||||
extern void SCIF_Handler(void);
|
||||
extern void FREQM_Handler(void);
|
||||
extern void GPIO_0_Handler(void);
|
||||
extern void GPIO_1_Handler(void);
|
||||
extern void GPIO_2_Handler(void);
|
||||
extern void GPIO_3_Handler(void);
|
||||
extern void GPIO_4_Handler(void);
|
||||
extern void GPIO_5_Handler(void);
|
||||
extern void GPIO_6_Handler(void);
|
||||
extern void GPIO_7_Handler(void);
|
||||
extern void GPIO_8_Handler(void);
|
||||
extern void GPIO_9_Handler(void);
|
||||
extern void GPIO_10_Handler(void);
|
||||
extern void GPIO_11_Handler(void);
|
||||
extern void BPM_Handler(void);
|
||||
extern void BSCIF_Handler(void);
|
||||
extern void AST_ALARM_Handler(void);
|
||||
extern void AST_PER_Handler(void);
|
||||
extern void AST_OVF_Handler(void);
|
||||
extern void AST_READY_Handler(void);
|
||||
extern void AST_CLKREADY_Handler(void);
|
||||
extern void WDT_Handler(void);
|
||||
extern void EIC_1_Handler(void);
|
||||
extern void EIC_2_Handler(void);
|
||||
extern void EIC_3_Handler(void);
|
||||
extern void EIC_4_Handler(void);
|
||||
extern void EIC_5_Handler(void);
|
||||
extern void EIC_6_Handler(void);
|
||||
extern void EIC_7_Handler(void);
|
||||
extern void EIC_8_Handler(void);
|
||||
extern void IISC_Handler(void);
|
||||
extern void SPI_Handler(void);
|
||||
extern void TC00_Handler(void);
|
||||
extern void TC01_Handler(void);
|
||||
extern void TC02_Handler(void);
|
||||
extern void TC010_Handler(void);
|
||||
extern void TC011_Handler(void);
|
||||
extern void TC012_Handler(void);
|
||||
extern void TWIM0_Handler(void);
|
||||
extern void TWIS0_Handler(void);
|
||||
extern void TWIM1_Handler(void);
|
||||
extern void TWIS1_Handler(void);
|
||||
extern void USART0_Handler(void);
|
||||
extern void USART1_Handler(void);
|
||||
extern void USART2_Handler(void);
|
||||
extern void USART3_Handler(void);
|
||||
extern void ADCIFE_Handler(void);
|
||||
extern void DACC_Handler(void);
|
||||
extern void ACIFC_Handler(void);
|
||||
extern void ABDACB_Handler(void);
|
||||
extern void TRNG_Handler(void);
|
||||
extern void PARC_Handler(void);
|
||||
extern void CATB_Handler(void);
|
||||
extern void Dummy_Handler(void);
|
||||
extern void TWIM2_Handler(void);
|
||||
extern void TWIM3_Handler(void);
|
||||
extern void LCDCA_Handler(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32 vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
HFLASHC_Handler, PDCA_0_Handler, PDCA_1_Handler, PDCA_2_Handler,
|
||||
PDCA_3_Handler, PDCA_4_Handler, PDCA_5_Handler, PDCA_6_Handler,
|
||||
PDCA_7_Handler, PDCA_8_Handler, PDCA_9_Handler, PDCA_10_Handler,
|
||||
PDCA_11_Handler, PDCA_12_Handler, PDCA_13_Handler, PDCA_14_Handler,
|
||||
PDCA_15_Handler, CRCCU_Handler, USBC_Handler, PEVC_TR_Handler,
|
||||
PEVC_OV_Handler, AESA_Handler, PM_Handler, SCIF_Handler,
|
||||
FREQM_Handler, GPIO_0_Handler, GPIO_1_Handler, GPIO_2_Handler,
|
||||
GPIO_3_Handler, GPIO_4_Handler, GPIO_5_Handler, GPIO_6_Handler,
|
||||
GPIO_7_Handler, GPIO_8_Handler, GPIO_9_Handler, GPIO_10_Handler,
|
||||
GPIO_11_Handler, BPM_Handler, BSCIF_Handler, AST_ALARM_Handler,
|
||||
AST_PER_Handler, AST_OVF_Handler, AST_READY_Handler, AST_CLKREADY_Handler,
|
||||
WDT_Handler, EIC_1_Handler, EIC_2_Handler, EIC_3_Handler,
|
||||
EIC_4_Handler, EIC_5_Handler, EIC_6_Handler, EIC_7_Handler,
|
||||
EIC_8_Handler, IISC_Handler, SPI_Handler, TC00_Handler,
|
||||
TC01_Handler, TC02_Handler, TC010_Handler, TC011_Handler,
|
||||
TC012_Handler, TWIM0_Handler, TWIS0_Handler, TWIM1_Handler,
|
||||
TWIS1_Handler, USART0_Handler, USART1_Handler, USART2_Handler,
|
||||
USART3_Handler, ADCIFE_Handler, DACC_Handler, ACIFC_Handler,
|
||||
ABDACB_Handler, TRNG_Handler, PARC_Handler, CATB_Handler,
|
||||
Dummy_Handler, TWIM2_Handler, TWIM3_Handler, LCDCA_Handler
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HFLASHC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_4_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_5_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_6_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_7_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_8_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_9_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_10_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_11_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_12_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_13_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_14_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PDCA_15_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void CRCCU_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void USBC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PEVC_TR_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PEVC_OV_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void AESA_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SCIF_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void FREQM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_4_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_5_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_6_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_7_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_8_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_9_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_10_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void GPIO_11_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BPM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BSCIF_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void AST_ALARM_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void AST_PER_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void AST_OVF_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void AST_READY_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void AST_CLKREADY_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void WDT_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_4_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_5_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_6_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_7_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void EIC_8_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void IISC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SPI_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TC00_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TC01_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TC02_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TC010_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TC011_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TC012_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TWIM0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TWIS0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TWIM1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TWIS1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void USART0_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void USART1_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void USART2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void USART3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void ADCIFE_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DACC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void ACIFC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void ABDACB_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TRNG_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PARC_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void CATB_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Dummy_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TWIM2_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void TWIM3_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void LCDCA_Handler(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F0xx/cmparams.h
|
||||
* @brief ARM Cortex-M0 parameters for the STM32F0xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F0xx STM32F0xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M0 specific parameters for the
|
||||
* STM32F0xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M0
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 2
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F030x8 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 64k
|
||||
ram : org = 0x20000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F051x8 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 64k
|
||||
ram : org = 0x20000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M0 STM32 port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v6m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F0xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F0xx/ld
|
||||
@ -0,0 +1,205 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F0xx/vectors.c
|
||||
* @brief Interrupt vectors for the STM32F0xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F0xx_VECTORS STM32F0xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the STM32F0xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[32];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32 vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F1xx/cmparams.h
|
||||
* @brief ARM Cortex-M3 parameters for the STM32F1xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F1xx STM32F1xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M3 specific parameters for the
|
||||
* STM32F1xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M3
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F100xB memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 128k
|
||||
ram : org = 0x20000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F103xB memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 128k
|
||||
ram : org = 0x20000000, len = 20k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F103xE memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 384k
|
||||
ram : org = 0x20000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F103xE memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 512k
|
||||
ram : org = 0x20000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F103xG memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 1m
|
||||
ram : org = 0x20000000, len = 96k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F107xC memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 256k
|
||||
ram : org = 0x20000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M3 STM32 port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F1xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F1xx/ld
|
||||
@ -0,0 +1,337 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F1xx/vectors.c
|
||||
* @brief Interrupt vectors for the STM32F1xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F1xx_VECTORS STM32F1xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the STM32F1xx family.
|
||||
* One of the following macros must be defined on the
|
||||
* compiler command line or in a file named <tt>board.h</tt>:
|
||||
* - @p STM32F10X_LD
|
||||
* - @p STM32F10X_LD_VL
|
||||
* - @p STM32F10X_MD
|
||||
* - @p STM32F10X_MD_VL
|
||||
* - @p STM32F10X_HD
|
||||
* - @p STM32F10X_XL
|
||||
* - @p STM32F10X_CL
|
||||
* .
|
||||
* This is required in order to include a vectors table with
|
||||
* the correct length for the specified STM32 model.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
#if !defined(STM32F10X_LD) && !defined(STM32F10X_LD_VL) && \
|
||||
!defined(STM32F10X_MD) && !defined(STM32F10X_MD_VL) && \
|
||||
!defined(STM32F10X_HD) && !defined(STM32F10X_XL) && \
|
||||
!defined(STM32F10X_CL)
|
||||
#include "board.h"
|
||||
#endif
|
||||
|
||||
#if defined(STM32F10X_MD_VL) || defined(__DOXYGEN__)
|
||||
#define NUM_VECTORS 46
|
||||
#elif defined(STM32F10X_HD) || defined(STM32F10X_XL)
|
||||
#define NUM_VECTORS 60
|
||||
#elif defined(STM32F10X_CL)
|
||||
#define NUM_VECTORS 68
|
||||
#else
|
||||
#define NUM_VECTORS 43
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[NUM_VECTORS];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
extern void VectorC0(void);
|
||||
extern void VectorC4(void);
|
||||
extern void VectorC8(void);
|
||||
extern void VectorCC(void);
|
||||
extern void VectorD0(void);
|
||||
extern void VectorD4(void);
|
||||
extern void VectorD8(void);
|
||||
extern void VectorDC(void);
|
||||
extern void VectorE0(void);
|
||||
extern void VectorE4(void);
|
||||
extern void VectorE8(void);
|
||||
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
|
||||
defined(STM32F10X_XL) || defined(STM32F10X_CL)
|
||||
extern void VectorEC(void);
|
||||
extern void VectorF0(void);
|
||||
extern void VectorF4(void);
|
||||
#endif
|
||||
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
|
||||
extern void VectorF8(void);
|
||||
extern void VectorFC(void);
|
||||
extern void Vector100(void);
|
||||
extern void Vector104(void);
|
||||
extern void Vector108(void);
|
||||
extern void Vector10C(void);
|
||||
extern void Vector110(void);
|
||||
extern void Vector114(void);
|
||||
extern void Vector118(void);
|
||||
extern void Vector11C(void);
|
||||
extern void Vector120(void);
|
||||
extern void Vector124(void);
|
||||
extern void Vector128(void);
|
||||
extern void Vector12C(void);
|
||||
#endif
|
||||
#if defined(STM32F10X_CL)
|
||||
extern void Vector130(void);
|
||||
extern void Vector134(void);
|
||||
extern void Vector138(void);
|
||||
extern void Vector13C(void);
|
||||
extern void Vector140(void);
|
||||
extern void Vector144(void);
|
||||
extern void Vector148(void);
|
||||
extern void Vector14C(void);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32 vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC,
|
||||
VectorC0, VectorC4, VectorC8, VectorCC,
|
||||
VectorD0, VectorD4, VectorD8, VectorDC,
|
||||
VectorE0, VectorE4, VectorE8,
|
||||
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
|
||||
defined(STM32F10X_XL) || defined(STM32F10X_CL)
|
||||
VectorEC, VectorF0, VectorF4,
|
||||
#endif
|
||||
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
|
||||
VectorF8, VectorFC, Vector100, Vector104,
|
||||
Vector108, Vector10C, Vector110, Vector114,
|
||||
Vector118, Vector11C, Vector120, Vector124,
|
||||
Vector128, Vector12C,
|
||||
#endif
|
||||
#if defined(STM32F10X_CL)
|
||||
Vector130, Vector134, Vector138, Vector13C,
|
||||
Vector140, Vector144, Vector148, Vector14C
|
||||
#endif
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
#if defined(STM32F10X_MD_VL) || defined(STM32F10X_HD) || \
|
||||
defined(STM32F10X_XL) || defined(STM32F10X_CL)
|
||||
void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
#endif
|
||||
#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32F10X_CL)
|
||||
void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
#endif
|
||||
#if defined(STM32F10X_CL)
|
||||
void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F2xx/cmparams.h
|
||||
* @brief ARM Cortex-M3 parameters for the STM32F2xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F2xx STM32F2xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M4 specific parameters for the
|
||||
* STM32F2xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M3
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F205xB memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 128k
|
||||
ram : org = 0x20000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,146 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F207xG memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 1M
|
||||
ram : org = 0x20000000, len = 112k
|
||||
ethram : org = 0x2001C000, len = 16k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M3 STM32 port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F2xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F2xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F2xx/ld
|
||||
@ -0,0 +1,316 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F2xx/vectors.c
|
||||
* @brief Interrupt vectors for the STM32F2xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F2xx_VECTORS STM32F2xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the STM32F2xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[81];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
extern void VectorC0(void);
|
||||
extern void VectorC4(void);
|
||||
extern void VectorC8(void);
|
||||
extern void VectorCC(void);
|
||||
extern void VectorD0(void);
|
||||
extern void VectorD4(void);
|
||||
extern void VectorD8(void);
|
||||
extern void VectorDC(void);
|
||||
extern void VectorE0(void);
|
||||
extern void VectorE4(void);
|
||||
extern void VectorE8(void);
|
||||
extern void VectorEC(void);
|
||||
extern void VectorF0(void);
|
||||
extern void VectorF4(void);
|
||||
extern void VectorF8(void);
|
||||
extern void VectorFC(void);
|
||||
extern void Vector100(void);
|
||||
extern void Vector104(void);
|
||||
extern void Vector108(void);
|
||||
extern void Vector10C(void);
|
||||
extern void Vector110(void);
|
||||
extern void Vector114(void);
|
||||
extern void Vector118(void);
|
||||
extern void Vector11C(void);
|
||||
extern void Vector120(void);
|
||||
extern void Vector124(void);
|
||||
extern void Vector128(void);
|
||||
extern void Vector12C(void);
|
||||
extern void Vector130(void);
|
||||
extern void Vector134(void);
|
||||
extern void Vector138(void);
|
||||
extern void Vector13C(void);
|
||||
extern void Vector140(void);
|
||||
extern void Vector144(void);
|
||||
extern void Vector148(void);
|
||||
extern void Vector14C(void);
|
||||
extern void Vector150(void);
|
||||
extern void Vector154(void);
|
||||
extern void Vector158(void);
|
||||
extern void Vector15C(void);
|
||||
extern void Vector160(void);
|
||||
extern void Vector164(void);
|
||||
extern void Vector168(void);
|
||||
extern void Vector16C(void);
|
||||
extern void Vector170(void);
|
||||
extern void Vector174(void);
|
||||
extern void Vector178(void);
|
||||
extern void Vector17C(void);
|
||||
extern void Vector180(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32 vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC,
|
||||
VectorC0, VectorC4, VectorC8, VectorCC,
|
||||
VectorD0, VectorD4, VectorD8, VectorDC,
|
||||
VectorE0, VectorE4, VectorE8, VectorEC,
|
||||
VectorF0, VectorF4, VectorF8, VectorFC,
|
||||
Vector100, Vector104, Vector108, Vector10C,
|
||||
Vector110, Vector114, Vector118, Vector11C,
|
||||
Vector120, Vector124, Vector128, Vector12C,
|
||||
Vector130, Vector134, Vector138, Vector13C,
|
||||
Vector140, Vector144, Vector148, Vector14C,
|
||||
Vector150, Vector154, Vector158, Vector15C,
|
||||
Vector160, Vector164, Vector168, Vector16C,
|
||||
Vector170, Vector174, Vector178, Vector17C,
|
||||
Vector180
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector150(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector154(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector158(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector15C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector160(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector164(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector168(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector16C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector170(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector174(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector178(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector17C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector180(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F3xx/cmparams.h
|
||||
* @brief ARM Cortex-M4 parameters for the STM32F3xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F3xx STM32F3xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M4 specific parameters for the
|
||||
* STM32F3xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M4
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,146 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F303xC memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 256k
|
||||
ram : org = 0x20000000, len = 40k
|
||||
ccmram : org = 0x10000000, len = 8k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F373xC memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 256k
|
||||
ram : org = 0x20000000, len = 32k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M4 STM32 port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F3xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F3xx/ld
|
||||
@ -0,0 +1,318 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F3xx/vectors.c
|
||||
* @brief Interrupt vectors for the STM32F3xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F3xx_VECTORS STM32F3xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the STM32F3xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[82];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
extern void VectorC0(void);
|
||||
extern void VectorC4(void);
|
||||
extern void VectorC8(void);
|
||||
extern void VectorCC(void);
|
||||
extern void VectorD0(void);
|
||||
extern void VectorD4(void);
|
||||
extern void VectorD8(void);
|
||||
extern void VectorDC(void);
|
||||
extern void VectorE0(void);
|
||||
extern void VectorE4(void);
|
||||
extern void VectorE8(void);
|
||||
extern void VectorEC(void);
|
||||
extern void VectorF0(void);
|
||||
extern void VectorF4(void);
|
||||
extern void VectorF8(void);
|
||||
extern void VectorFC(void);
|
||||
extern void Vector100(void);
|
||||
extern void Vector104(void);
|
||||
extern void Vector108(void);
|
||||
extern void Vector10C(void);
|
||||
extern void Vector110(void);
|
||||
extern void Vector114(void);
|
||||
extern void Vector118(void);
|
||||
extern void Vector11C(void);
|
||||
extern void Vector120(void);
|
||||
extern void Vector124(void);
|
||||
extern void Vector128(void);
|
||||
extern void Vector12C(void);
|
||||
extern void Vector130(void);
|
||||
extern void Vector134(void);
|
||||
extern void Vector138(void);
|
||||
extern void Vector13C(void);
|
||||
extern void Vector140(void);
|
||||
extern void Vector144(void);
|
||||
extern void Vector148(void);
|
||||
extern void Vector14C(void);
|
||||
extern void Vector150(void);
|
||||
extern void Vector154(void);
|
||||
extern void Vector158(void);
|
||||
extern void Vector15C(void);
|
||||
extern void Vector160(void);
|
||||
extern void Vector164(void);
|
||||
extern void Vector168(void);
|
||||
extern void Vector16C(void);
|
||||
extern void Vector170(void);
|
||||
extern void Vector174(void);
|
||||
extern void Vector178(void);
|
||||
extern void Vector17C(void);
|
||||
extern void Vector180(void);
|
||||
extern void Vector184(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32 vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC,
|
||||
VectorC0, VectorC4, VectorC8, VectorCC,
|
||||
VectorD0, VectorD4, VectorD8, VectorDC,
|
||||
VectorE0, VectorE4, VectorE8, VectorEC,
|
||||
VectorF0, VectorF4, VectorF8, VectorFC,
|
||||
Vector100, Vector104, Vector108, Vector10C,
|
||||
Vector110, Vector114, Vector118, Vector11C,
|
||||
Vector120, Vector124, Vector128, Vector12C,
|
||||
Vector130, Vector134, Vector138, Vector13C,
|
||||
Vector140, Vector144, Vector148, Vector14C,
|
||||
Vector150, Vector154, Vector158, Vector15C,
|
||||
Vector160, Vector164, Vector168, Vector16C,
|
||||
Vector170, Vector174, Vector178, Vector17C,
|
||||
Vector180, Vector184
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector150(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector154(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector158(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector15C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector160(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector164(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector168(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector16C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector170(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector174(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector178(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector17C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector180(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector184(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F4xx/cmparams.h
|
||||
* @brief ARM Cortex-M4 parameters for the STM32F4xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F4xx STM32F4xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M4 specific parameters for the
|
||||
* STM32F4xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M4
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F401xC memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 256k
|
||||
ram : org = 0x20000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F401xE memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 512k
|
||||
ram : org = 0x20000000, len = 96k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,147 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F405xG memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 1M
|
||||
ram : org = 0x20000000, len = 112k
|
||||
ethram : org = 0x2001C000, len = 16k
|
||||
ccmram : org = 0x10000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,147 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F407xG memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 1M
|
||||
ram : org = 0x20000000, len = 112k
|
||||
ethram : org = 0x2001C000, len = 16k
|
||||
ccmram : org = 0x10000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,172 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F407xG memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 1M
|
||||
ram : org = 0x20000000, len = 112k
|
||||
ethram : org = 0x2001C000, len = 16k
|
||||
ccmram : org = 0x10000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ccmram
|
||||
|
||||
.ccm (NOLOAD):
|
||||
{
|
||||
PROVIDE(_cmm_start = .);
|
||||
. = ALIGN(4);
|
||||
*(.ccm)
|
||||
. = ALIGN(4);
|
||||
*(.ccm.*)
|
||||
. = ALIGN(4);
|
||||
*(.bss.mainthread.*)
|
||||
. = ALIGN(4);
|
||||
*(.bss._idle_thread_wa)
|
||||
. = ALIGN(4);
|
||||
*(.bss.rlist)
|
||||
. = ALIGN(4);
|
||||
*(.bss.vtlist)
|
||||
. = ALIGN(4);
|
||||
*(.bss.endmem)
|
||||
. = ALIGN(4);
|
||||
*(.bss.nextmem)
|
||||
. = ALIGN(4);
|
||||
*(.bss.default_heap)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_cmm_end = .);
|
||||
} > ccmram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,146 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32F429xI memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 2M
|
||||
ram : org = 0x20000000, len = 192k
|
||||
ccmram : org = 0x10000000, len = 64k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M4 STM32 port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F4xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32F4xx/ld
|
||||
@ -0,0 +1,338 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32F4xx/vectors.c
|
||||
* @brief Interrupt vectors for the STM32F4xx family.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32F4xx_VECTORS STM32F4xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the STM32F4xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[91];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
extern void VectorC0(void);
|
||||
extern void VectorC4(void);
|
||||
extern void VectorC8(void);
|
||||
extern void VectorCC(void);
|
||||
extern void VectorD0(void);
|
||||
extern void VectorD4(void);
|
||||
extern void VectorD8(void);
|
||||
extern void VectorDC(void);
|
||||
extern void VectorE0(void);
|
||||
extern void VectorE4(void);
|
||||
extern void VectorE8(void);
|
||||
extern void VectorEC(void);
|
||||
extern void VectorF0(void);
|
||||
extern void VectorF4(void);
|
||||
extern void VectorF8(void);
|
||||
extern void VectorFC(void);
|
||||
extern void Vector100(void);
|
||||
extern void Vector104(void);
|
||||
extern void Vector108(void);
|
||||
extern void Vector10C(void);
|
||||
extern void Vector110(void);
|
||||
extern void Vector114(void);
|
||||
extern void Vector118(void);
|
||||
extern void Vector11C(void);
|
||||
extern void Vector120(void);
|
||||
extern void Vector124(void);
|
||||
extern void Vector128(void);
|
||||
extern void Vector12C(void);
|
||||
extern void Vector130(void);
|
||||
extern void Vector134(void);
|
||||
extern void Vector138(void);
|
||||
extern void Vector13C(void);
|
||||
extern void Vector140(void);
|
||||
extern void Vector144(void);
|
||||
extern void Vector148(void);
|
||||
extern void Vector14C(void);
|
||||
extern void Vector150(void);
|
||||
extern void Vector154(void);
|
||||
extern void Vector158(void);
|
||||
extern void Vector15C(void);
|
||||
extern void Vector160(void);
|
||||
extern void Vector164(void);
|
||||
extern void Vector168(void);
|
||||
extern void Vector16C(void);
|
||||
extern void Vector170(void);
|
||||
extern void Vector174(void);
|
||||
extern void Vector178(void);
|
||||
extern void Vector17C(void);
|
||||
extern void Vector180(void);
|
||||
extern void Vector184(void);
|
||||
extern void Vector188(void);
|
||||
extern void Vector18C(void);
|
||||
extern void Vector190(void);
|
||||
extern void Vector194(void);
|
||||
extern void Vector198(void);
|
||||
extern void Vector19C(void);
|
||||
extern void Vector1A0(void);
|
||||
extern void Vector1A4(void);
|
||||
extern void Vector1A8(void);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief STM32 vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC,
|
||||
VectorC0, VectorC4, VectorC8, VectorCC,
|
||||
VectorD0, VectorD4, VectorD8, VectorDC,
|
||||
VectorE0, VectorE4, VectorE8, VectorEC,
|
||||
VectorF0, VectorF4, VectorF8, VectorFC,
|
||||
Vector100, Vector104, Vector108, Vector10C,
|
||||
Vector110, Vector114, Vector118, Vector11C,
|
||||
Vector120, Vector124, Vector128, Vector12C,
|
||||
Vector130, Vector134, Vector138, Vector13C,
|
||||
Vector140, Vector144, Vector148, Vector14C,
|
||||
Vector150, Vector154, Vector158, Vector15C,
|
||||
Vector160, Vector164, Vector168, Vector16C,
|
||||
Vector170, Vector174, Vector178, Vector17C,
|
||||
Vector180, Vector184, Vector188, Vector18C,
|
||||
Vector190, Vector194, Vector198, Vector19C,
|
||||
Vector1A0, Vector1A4, Vector1A8
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorFC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector100(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector104(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector108(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector10C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector110(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector114(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector118(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector11C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector120(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector124(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector128(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector12C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector130(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector134(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector138(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector13C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector140(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector144(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector148(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector14C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector150(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector154(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector158(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector15C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector160(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector164(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector168(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector16C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector170(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector174(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector178(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector17C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector180(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector184(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector188(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector18C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector190(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector194(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector198(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector19C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1A0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1A4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1A8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,69 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32L1xx/cmparams.h
|
||||
* @brief ARM Cortex-M3 parameters for the STM32L1xx.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32L1xx STM32L1xx Specific Parameters
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details This file contains the Cortex-M3 specific parameters for the
|
||||
* STM32L1xx platform.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CMPARAMS_H_
|
||||
#define _CMPARAMS_H_
|
||||
|
||||
/**
|
||||
* @brief Cortex core model.
|
||||
*/
|
||||
#define CORTEX_MODEL CORTEX_M3
|
||||
|
||||
/**
|
||||
* @brief Systick unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_ST TRUE
|
||||
|
||||
/**
|
||||
* @brief Memory Protection unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_MPU TRUE
|
||||
|
||||
/**
|
||||
* @brief Floating Point unit presence.
|
||||
*/
|
||||
#define CORTEX_HAS_FPU FALSE
|
||||
|
||||
/**
|
||||
* @brief Number of bits in priority masks.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
|
||||
#endif /* _CMPARAMS_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32L1152xB memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 128k
|
||||
ram : org = 0x20000000, len = 16k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,145 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* ST32L1152xB memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0400;
|
||||
__process_stack_size__ = 0x0400;
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash : org = 0x08000000, len = 512k
|
||||
ram : org = 0x20000000, len = 80k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = LENGTH(ram);
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
ENTRY(ResetHandler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
_text = .;
|
||||
|
||||
startup : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
KEEP(*(vectors))
|
||||
} > flash
|
||||
|
||||
constructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__init_array_start = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__init_array_end = .);
|
||||
} > flash
|
||||
|
||||
destructors : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
PROVIDE(__fini_array_start = .);
|
||||
KEEP(*(.fini_array))
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
PROVIDE(__fini_array_end = .);
|
||||
} > flash
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
} > flash
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO
|
||||
{
|
||||
*(.eh_frame)
|
||||
} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO
|
||||
{
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.stacks :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
__process_stack_base__ = .;
|
||||
__main_thread_stack_base__ = .;
|
||||
. += __process_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack_end__ = .;
|
||||
__main_thread_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss ALIGN(4) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
}
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@ -0,0 +1,15 @@
|
||||
# List of the ChibiOS/RT Cortex-M3 STM32L1xx port files.
|
||||
PORTSRC = $(CHIBIOS)/os/ports/GCC/ARMCMx/crt0.c \
|
||||
$(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/vectors.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/chcore_v7m.c \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx/nvic.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/common/ARMCMx/CMSIS/include \
|
||||
${CHIBIOS}/os/ports/common/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx \
|
||||
${CHIBIOS}/os/ports/GCC/ARMCMx/STM32L1xx
|
||||
|
||||
PORTLD = ${CHIBIOS}/os/ports/GCC/ARMCMx/STM32L1xx/ld
|
||||
@ -0,0 +1,235 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/STM32L1xx/vectors.c
|
||||
* @brief Interrupt vectors for the STM32 family.
|
||||
*
|
||||
* @defgroup ARMCMx_STM32L1xx_VECTORS STM32L1xx Interrupt Vectors
|
||||
* @ingroup ARMCMx_SPECIFIC
|
||||
* @details Interrupt vectors for the STM32L1xx family.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Type of an IRQ vector.
|
||||
*/
|
||||
typedef void (*irq_vector_t)(void);
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing the whole vectors table.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t *init_stack;
|
||||
irq_vector_t reset_vector;
|
||||
irq_vector_t nmi_vector;
|
||||
irq_vector_t hardfault_vector;
|
||||
irq_vector_t memmanage_vector;
|
||||
irq_vector_t busfault_vector;
|
||||
irq_vector_t usagefault_vector;
|
||||
irq_vector_t vector1c;
|
||||
irq_vector_t vector20;
|
||||
irq_vector_t vector24;
|
||||
irq_vector_t vector28;
|
||||
irq_vector_t svcall_vector;
|
||||
irq_vector_t debugmonitor_vector;
|
||||
irq_vector_t vector34;
|
||||
irq_vector_t pendsv_vector;
|
||||
irq_vector_t systick_vector;
|
||||
irq_vector_t vectors[45];
|
||||
} vectors_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern uint32_t __main_stack_end__;
|
||||
extern void ResetHandler(void);
|
||||
extern void NMIVector(void);
|
||||
extern void HardFaultVector(void);
|
||||
extern void MemManageVector(void);
|
||||
extern void BusFaultVector(void);
|
||||
extern void UsageFaultVector(void);
|
||||
extern void Vector1C(void);
|
||||
extern void Vector20(void);
|
||||
extern void Vector24(void);
|
||||
extern void Vector28(void);
|
||||
extern void SVCallVector(void);
|
||||
extern void DebugMonitorVector(void);
|
||||
extern void Vector34(void);
|
||||
extern void PendSVVector(void);
|
||||
extern void SysTickVector(void);
|
||||
extern void Vector40(void);
|
||||
extern void Vector44(void);
|
||||
extern void Vector48(void);
|
||||
extern void Vector4C(void);
|
||||
extern void Vector50(void);
|
||||
extern void Vector54(void);
|
||||
extern void Vector58(void);
|
||||
extern void Vector5C(void);
|
||||
extern void Vector60(void);
|
||||
extern void Vector64(void);
|
||||
extern void Vector68(void);
|
||||
extern void Vector6C(void);
|
||||
extern void Vector70(void);
|
||||
extern void Vector74(void);
|
||||
extern void Vector78(void);
|
||||
extern void Vector7C(void);
|
||||
extern void Vector80(void);
|
||||
extern void Vector84(void);
|
||||
extern void Vector88(void);
|
||||
extern void Vector8C(void);
|
||||
extern void Vector90(void);
|
||||
extern void Vector94(void);
|
||||
extern void Vector98(void);
|
||||
extern void Vector9C(void);
|
||||
extern void VectorA0(void);
|
||||
extern void VectorA4(void);
|
||||
extern void VectorA8(void);
|
||||
extern void VectorAC(void);
|
||||
extern void VectorB0(void);
|
||||
extern void VectorB4(void);
|
||||
extern void VectorB8(void);
|
||||
extern void VectorBC(void);
|
||||
extern void VectorC0(void);
|
||||
extern void VectorC4(void);
|
||||
extern void VectorC8(void);
|
||||
extern void VectorCC(void);
|
||||
extern void VectorD0(void);
|
||||
extern void VectorD4(void);
|
||||
extern void VectorD8(void);
|
||||
extern void VectorDC(void);
|
||||
extern void VectorE0(void);
|
||||
extern void VectorE4(void);
|
||||
extern void VectorE8(void);
|
||||
extern void VectorEC(void);
|
||||
extern void VectorF0(void);
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/**
|
||||
* @brief STM32L1xx vectors table.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((section("vectors")))
|
||||
#endif
|
||||
vectors_t _vectors = {
|
||||
&__main_stack_end__,ResetHandler, NMIVector, HardFaultVector,
|
||||
MemManageVector, BusFaultVector, UsageFaultVector, Vector1C,
|
||||
Vector20, Vector24, Vector28, SVCallVector,
|
||||
DebugMonitorVector, Vector34, PendSVVector, SysTickVector,
|
||||
{
|
||||
Vector40, Vector44, Vector48, Vector4C,
|
||||
Vector50, Vector54, Vector58, Vector5C,
|
||||
Vector60, Vector64, Vector68, Vector6C,
|
||||
Vector70, Vector74, Vector78, Vector7C,
|
||||
Vector80, Vector84, Vector88, Vector8C,
|
||||
Vector90, Vector94, Vector98, Vector9C,
|
||||
VectorA0, VectorA4, VectorA8, VectorAC,
|
||||
VectorB0, VectorB4, VectorB8, VectorBC,
|
||||
VectorC0, VectorC4, VectorC8, VectorCC,
|
||||
VectorD0, VectorD4, VectorD8, VectorDC,
|
||||
VectorE0, VectorE4, VectorE8, VectorEC,
|
||||
VectorF0
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Unhandled exceptions handler.
|
||||
* @details Any undefined exception vector points to this function by default.
|
||||
* This function simply stops the system into an infinite loop.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__ ((naked))
|
||||
#endif
|
||||
void _unhandled_exception(void) {
|
||||
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
void NMIVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void HardFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void MemManageVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void BusFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void UsageFaultVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector1C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector20(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector24(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector28(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SVCallVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void DebugMonitorVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector34(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void PendSVVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void SysTickVector(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector40(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector44(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector48(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector4C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector50(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector54(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector58(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector5C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector60(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector64(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector68(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector6C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector70(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector74(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector78(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector7C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector80(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector84(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector88(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector8C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector90(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector94(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector98(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void Vector9C(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorA8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorAC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorB8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorBC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorC8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorCC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorD8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorDC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE4(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorE8(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorEC(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
void VectorF0(void) __attribute__((weak, alias("_unhandled_exception")));
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,53 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chcore.c
|
||||
* @brief ARM Cortex-Mx port code.
|
||||
*
|
||||
* @addtogroup ARMCMx_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Halts the system.
|
||||
* @note The function is declared as a weak symbol, it is possible
|
||||
* to redefine it in your application code.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((weak))
|
||||
#endif
|
||||
void port_halt(void) {
|
||||
|
||||
port_disable();
|
||||
while (TRUE) {
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,195 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chcore.h
|
||||
* @brief ARM Cortex-Mx port macros and structures.
|
||||
*
|
||||
* @addtogroup ARMCMx_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCORE_H_
|
||||
#define _CHCORE_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port constants (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Added to make the header stand-alone when included from asm.*/
|
||||
#ifndef FALSE
|
||||
#define FALSE 0
|
||||
#endif
|
||||
#ifndef TRUE
|
||||
#define TRUE (!FALSE)
|
||||
#endif
|
||||
|
||||
#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
|
||||
#define CORTEX_M1 1 /**< @brief Cortex-M1 variant. */
|
||||
#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
|
||||
#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
|
||||
|
||||
/* Inclusion of the Cortex-Mx implementation specific parameters.*/
|
||||
#include "cmparams.h"
|
||||
|
||||
/* Cortex model check, only M0 and M3 supported right now.*/
|
||||
#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M3) || \
|
||||
(CORTEX_MODEL == CORTEX_M4)
|
||||
#elif (CORTEX_MODEL == CORTEX_M1)
|
||||
#warning "untested Cortex-M model"
|
||||
#else
|
||||
#error "unknown or unsupported Cortex-M model"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Total priority levels.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_LEVELS (1 << CORTEX_PRIORITY_BITS)
|
||||
|
||||
/**
|
||||
* @brief Minimum priority level.
|
||||
* @details This minimum priority level is calculated from the number of
|
||||
* priority bits supported by the specific Cortex-Mx implementation.
|
||||
*/
|
||||
#define CORTEX_MINIMUM_PRIORITY (CORTEX_PRIORITY_LEVELS - 1)
|
||||
|
||||
/**
|
||||
* @brief Maximum priority level.
|
||||
* @details The maximum allowed priority level is always zero.
|
||||
*/
|
||||
#define CORTEX_MAXIMUM_PRIORITY 0
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port macros (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Priority level verification macro.
|
||||
*/
|
||||
#define CORTEX_IS_VALID_PRIORITY(n) \
|
||||
(((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
|
||||
|
||||
/**
|
||||
* @brief Priority level verification macro.
|
||||
*/
|
||||
#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
|
||||
(((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
|
||||
|
||||
/**
|
||||
* @brief Priority level to priority mask conversion macro.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_MASK(n) \
|
||||
((n) << (8 - CORTEX_PRIORITY_BITS))
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port configurable parameters (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port derived parameters (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port exported info (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Macro defining a generic ARM architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_ARM
|
||||
|
||||
/**
|
||||
* @brief Name of the compiler supported by this port.
|
||||
*/
|
||||
#define CH_COMPILER_NAME "GCC " __VERSION__
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port implementation part (common). */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Includes the sub-architecture-specific part.*/
|
||||
#if (CORTEX_MODEL == CORTEX_M0) || (CORTEX_MODEL == CORTEX_M1)
|
||||
#include "chcore_v6m.h"
|
||||
#elif (CORTEX_MODEL == CORTEX_M3) || (CORTEX_MODEL == CORTEX_M4)
|
||||
#include "chcore_v7m.h"
|
||||
#endif
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
#include "nvic.h"
|
||||
|
||||
/* The following declarations are there just for Doxygen documentation, the
|
||||
real declarations are inside the sub-headers.*/
|
||||
#if defined(__DOXYGEN__)
|
||||
|
||||
/**
|
||||
* @brief Stack and memory alignment enforcement.
|
||||
* @note In this architecture the stack alignment is enforced to 64 bits,
|
||||
* 32 bits alignment is supported by hardware but deprecated by ARM,
|
||||
* the implementation choice is to not offer the option.
|
||||
*/
|
||||
typedef uint64_t stkalign_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt saved context.
|
||||
* @details This structure represents the stack frame saved during a
|
||||
* preemption-capable interrupt handler.
|
||||
* @note It is implemented to match the Cortex-Mx exception context.
|
||||
*/
|
||||
struct extctx {};
|
||||
|
||||
/**
|
||||
* @brief System saved context.
|
||||
* @details This structure represents the inner stack frame during a context
|
||||
* switching.
|
||||
*/
|
||||
struct intctx {};
|
||||
|
||||
#endif /* defined(__DOXYGEN__) */
|
||||
|
||||
/**
|
||||
* @brief Excludes the default @p chSchIsPreemptionRequired()implementation.
|
||||
*/
|
||||
#define PORT_OPTIMIZED_ISPREEMPTIONREQUIRED
|
||||
|
||||
#if (CH_TIME_QUANTUM > 0) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Inline-able version of this kernel function.
|
||||
*/
|
||||
#define chSchIsPreemptionRequired() \
|
||||
(currp->p_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
|
||||
firstprio(&rlist.r_queue) >= currp->p_prio)
|
||||
#else /* CH_TIME_QUANTUM == 0 */
|
||||
#define chSchIsPreemptionRequired() \
|
||||
(firstprio(&rlist.r_queue) > currp->p_prio)
|
||||
#endif /* CH_TIME_QUANTUM == 0 */
|
||||
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _CHCORE_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,206 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chcore_v6m.c
|
||||
* @brief ARMv6-M architecture port code.
|
||||
*
|
||||
* @addtogroup ARMCMx_V6M_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System Timer vector.
|
||||
* @details This interrupt is used as system tick.
|
||||
* @note The timer must be initialized in the startup code.
|
||||
*/
|
||||
CH_IRQ_HANDLER(SysTickVector) {
|
||||
|
||||
CH_IRQ_PROLOGUE();
|
||||
|
||||
chSysLockFromIsr();
|
||||
chSysTimerHandlerI();
|
||||
chSysUnlockFromIsr();
|
||||
|
||||
CH_IRQ_EPILOGUE();
|
||||
}
|
||||
|
||||
#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief NMI vector.
|
||||
* @details The NMI vector is used for exception mode re-entering after a
|
||||
* context switch.
|
||||
*/
|
||||
void NMIVector(void) {
|
||||
register struct extctx *ctxp;
|
||||
|
||||
/* Discarding the current exception context and positioning the stack to
|
||||
point to the real one.*/
|
||||
asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
|
||||
ctxp++;
|
||||
asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
|
||||
port_unlock_from_isr();
|
||||
}
|
||||
#endif /* !CORTEX_ALTERNATE_SWITCH */
|
||||
|
||||
#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PendSV vector.
|
||||
* @details The PendSV vector is used for exception mode re-entering after a
|
||||
* context switch.
|
||||
*/
|
||||
void PendSVVector(void) {
|
||||
register struct extctx *ctxp;
|
||||
|
||||
/* Discarding the current exception context and positioning the stack to
|
||||
point to the real one.*/
|
||||
asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
|
||||
ctxp++;
|
||||
asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
|
||||
}
|
||||
#endif /* CORTEX_ALTERNATE_SWITCH */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
*
|
||||
* @param[in] lr value of the @p LR register on ISR entry
|
||||
*/
|
||||
void _port_irq_epilogue(regarm_t lr) {
|
||||
|
||||
if (lr != (regarm_t)0xFFFFFFF1) {
|
||||
register struct extctx *ctxp;
|
||||
|
||||
port_lock_from_isr();
|
||||
/* Adding an artificial exception return context, there is no need to
|
||||
populate it fully.*/
|
||||
asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
|
||||
ctxp--;
|
||||
asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
|
||||
ctxp->xpsr = (regarm_t)0x01000000;
|
||||
|
||||
/* The exit sequence is different depending on if a preemption is
|
||||
required or not.*/
|
||||
if (chSchIsPreemptionRequired()) {
|
||||
/* Preemption is required we need to enforce a context switch.*/
|
||||
ctxp->pc = (void *)_port_switch_from_isr;
|
||||
}
|
||||
else {
|
||||
/* Preemption not required, we just need to exit the exception
|
||||
atomically.*/
|
||||
ctxp->pc = (void *)_port_exit_from_isr;
|
||||
}
|
||||
|
||||
/* Note, returning without unlocking is intentional, this is done in
|
||||
order to keep the rest of the context switch atomic.*/
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Post-IRQ switch code.
|
||||
* @details The switch is performed in thread context then an NMI exception
|
||||
* is enforced in order to return to the exact point before the
|
||||
* preemption.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((naked))
|
||||
#endif
|
||||
void _port_switch_from_isr(void) {
|
||||
|
||||
dbg_check_lock();
|
||||
chSchDoReschedule();
|
||||
dbg_check_unlock();
|
||||
asm volatile ("_port_exit_from_isr:" : : : "memory");
|
||||
#if CORTEX_ALTERNATE_SWITCH
|
||||
SCB_ICSR = ICSR_PENDSVSET;
|
||||
port_unlock();
|
||||
#else
|
||||
SCB_ICSR = ICSR_NMIPENDSET;
|
||||
#endif
|
||||
/* The following loop should never be executed, the exception will kick in
|
||||
immediately.*/
|
||||
while (TRUE)
|
||||
;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
* is responsible for the context switch between 2 threads.
|
||||
* @note The implementation of this code affects <b>directly</b> the context
|
||||
* switch performance so optimize here as much as you can.
|
||||
*
|
||||
* @param[in] ntp the thread to be switched in
|
||||
* @param[in] otp the thread to be switched out
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((naked))
|
||||
#endif
|
||||
void _port_switch(Thread *ntp, Thread *otp) {
|
||||
register struct intctx *r13 asm ("r13");
|
||||
|
||||
asm volatile ("push {r4, r5, r6, r7, lr} \n\t"
|
||||
"mov r4, r8 \n\t"
|
||||
"mov r5, r9 \n\t"
|
||||
"mov r6, r10 \n\t"
|
||||
"mov r7, r11 \n\t"
|
||||
"push {r4, r5, r6, r7}" : : : "memory");
|
||||
|
||||
otp->p_ctx.r13 = r13;
|
||||
r13 = ntp->p_ctx.r13;
|
||||
|
||||
asm volatile ("pop {r4, r5, r6, r7} \n\t"
|
||||
"mov r8, r4 \n\t"
|
||||
"mov r9, r5 \n\t"
|
||||
"mov r10, r6 \n\t"
|
||||
"mov r11, r7 \n\t"
|
||||
"pop {r4, r5, r6, r7, pc}" : : "r" (r13) : "memory");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start a thread by invoking its work function.
|
||||
* @details If the work function returns @p chThdExit() is automatically
|
||||
* invoked.
|
||||
*/
|
||||
void _port_thread_start(void) {
|
||||
|
||||
chSysUnlock();
|
||||
asm volatile ("mov r0, r5 \n\t"
|
||||
"blx r4 \n\t"
|
||||
"bl chThdExit");
|
||||
}
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,383 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chcore_v6m.h
|
||||
* @brief ARMv6-M architecture port macros and structures.
|
||||
*
|
||||
* @addtogroup ARMCMx_V6M_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCORE_V6M_H_
|
||||
#define _CHCORE_V6M_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief PendSV priority level.
|
||||
* @note This priority is enforced to be equal to @p 0,
|
||||
* this handler always has the highest priority that cannot preempt
|
||||
* the kernel.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_PENDSV 0
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port configurable parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Stack size for the system idle thread.
|
||||
* @details This size depends on the idle thread implementation, usually
|
||||
* the idle thread should take no more space than those reserved
|
||||
* by @p PORT_INT_REQUIRED_STACK.
|
||||
* @note In this port it is set to 16 because the idle thread does have
|
||||
* a stack frame when compiling without optimizations. You may
|
||||
* reduce this value to zero when compiling with optimizations.
|
||||
*/
|
||||
#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
|
||||
#define PORT_IDLE_THREAD_STACK_SIZE 16
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Per-thread stack overhead for interrupts servicing.
|
||||
* @details This constant is used in the calculation of the correct working
|
||||
* area size.
|
||||
* @note In this port this value is conservatively set to 64 because the
|
||||
* function @p chSchDoReschedule() can have a stack frame, especially
|
||||
* with compiler optimizations disabled. The value can be reduced
|
||||
* when compiler optimizations are enabled.
|
||||
*/
|
||||
#if !defined(PORT_INT_REQUIRED_STACK)
|
||||
#define PORT_INT_REQUIRED_STACK 64
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the use of the WFI instruction in the idle thread loop.
|
||||
*/
|
||||
#if !defined(CORTEX_ENABLE_WFI_IDLE)
|
||||
#define CORTEX_ENABLE_WFI_IDLE FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief SYSTICK handler priority.
|
||||
* @note The default SYSTICK handler priority is calculated as the priority
|
||||
* level in the middle of the numeric priorities range.
|
||||
*/
|
||||
#if !defined(CORTEX_PRIORITY_SYSTICK)
|
||||
#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
|
||||
#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
|
||||
/* If it is externally redefined then better perform a validity check on it.*/
|
||||
#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Alternate preemption method.
|
||||
* @details Activating this option will make the Kernel use the PendSV
|
||||
* handler for preemption instead of the NMI handler.
|
||||
*/
|
||||
#ifndef CORTEX_ALTERNATE_SWITCH
|
||||
#define CORTEX_ALTERNATE_SWITCH FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port derived parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Maximum usable priority for normal ISRs.
|
||||
*/
|
||||
#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
|
||||
#define CORTEX_MAX_KERNEL_PRIORITY 1
|
||||
#else
|
||||
#define CORTEX_MAX_KERNEL_PRIORITY 0
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port exported info. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Macro defining the specific ARM architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_ARM_v6M
|
||||
|
||||
/**
|
||||
* @brief Name of the implemented architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_NAME "ARMv6-M"
|
||||
|
||||
/**
|
||||
* @brief Name of the architecture variant.
|
||||
*/
|
||||
#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)
|
||||
#define CH_CORE_VARIANT_NAME "Cortex-M0"
|
||||
#elif (CORTEX_MODEL == CORTEX_M1)
|
||||
#define CH_CORE_VARIANT_NAME "Cortex-M1"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Port-specific information string.
|
||||
*/
|
||||
#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
|
||||
#define CH_PORT_INFO "Preemption through NMI"
|
||||
#else
|
||||
#define CH_PORT_INFO "Preemption through PendSV"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port implementation part. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/**
|
||||
* @brief Generic ARM register.
|
||||
*/
|
||||
typedef void *regarm_t;
|
||||
|
||||
/* The documentation of the following declarations is in chconf.h in order
|
||||
to not have duplicated structure names into the documentation.*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
typedef uint64_t stkalign_t __attribute__ ((aligned (8)));
|
||||
|
||||
struct extctx {
|
||||
regarm_t r0;
|
||||
regarm_t r1;
|
||||
regarm_t r2;
|
||||
regarm_t r3;
|
||||
regarm_t r12;
|
||||
regarm_t lr_thd;
|
||||
regarm_t pc;
|
||||
regarm_t xpsr;
|
||||
};
|
||||
|
||||
struct intctx {
|
||||
regarm_t r8;
|
||||
regarm_t r9;
|
||||
regarm_t r10;
|
||||
regarm_t r11;
|
||||
regarm_t r4;
|
||||
regarm_t r5;
|
||||
regarm_t r6;
|
||||
regarm_t r7;
|
||||
regarm_t lr;
|
||||
};
|
||||
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p Thread structure.
|
||||
* @details In this port the structure just holds a pointer to the @p intctx
|
||||
* structure representing the stack pointer at context switch time.
|
||||
*/
|
||||
struct context {
|
||||
struct intctx *r13;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p chThdCreateI() API.
|
||||
* @details This code usually setup the context switching frame represented
|
||||
* by an @p intctx structure.
|
||||
*/
|
||||
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
|
||||
tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
|
||||
wsize - \
|
||||
sizeof(struct intctx)); \
|
||||
tp->p_ctx.r13->r4 = (void *)(pf); \
|
||||
tp->p_ctx.r13->r5 = (void *)(arg); \
|
||||
tp->p_ctx.r13->lr = (void *)(_port_thread_start); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enforces a correct alignment for a stack area size value.
|
||||
*/
|
||||
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
|
||||
|
||||
/**
|
||||
* @brief Computes the thread working area global size.
|
||||
*/
|
||||
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
|
||||
sizeof(struct intctx) + \
|
||||
sizeof(struct extctx) + \
|
||||
(n) + (PORT_INT_REQUIRED_STACK))
|
||||
|
||||
/**
|
||||
* @brief Static working area allocation.
|
||||
* @details This macro is used to allocate a static thread working area
|
||||
* aligned as both position and size.
|
||||
*/
|
||||
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
|
||||
|
||||
/**
|
||||
* @brief IRQ prologue code.
|
||||
* @details This macro must be inserted at the start of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_PROLOGUE() \
|
||||
regarm_t _saved_lr; \
|
||||
asm volatile ("mov %0, lr" : "=r" (_saved_lr) : : "memory")
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
* @details This macro must be inserted at the end of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_EPILOGUE() _port_irq_epilogue(_saved_lr)
|
||||
|
||||
/**
|
||||
* @brief IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#define PORT_IRQ_HANDLER(id) void id(void)
|
||||
|
||||
/**
|
||||
* @brief Fast IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#define PORT_FAST_IRQ_HANDLER(id) void id(void)
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
#define port_init() { \
|
||||
SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \
|
||||
nvicSetSystemHandlerPriority(HANDLER_PENDSV, \
|
||||
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV)); \
|
||||
nvicSetSystemHandlerPriority(HANDLER_SYSTICK, \
|
||||
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK)); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action.
|
||||
* @details Usually this function just disables interrupts but may perform
|
||||
* more actions.
|
||||
*/
|
||||
#define port_lock() asm volatile ("cpsid i" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action.
|
||||
* @details Usually this function just enables interrupts but may perform
|
||||
* more actions.
|
||||
*/
|
||||
#define port_unlock() asm volatile ("cpsie i" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action from an interrupt handler.
|
||||
* @details This function is invoked before invoking I-class APIs from
|
||||
* interrupt handlers. The implementation is architecture dependent,
|
||||
* in its simplest form it is void.
|
||||
* @note Same as @p port_lock() in this port.
|
||||
*/
|
||||
#define port_lock_from_isr() port_lock()
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action from an interrupt handler.
|
||||
* @details This function is invoked after invoking I-class APIs from interrupt
|
||||
* handlers. The implementation is architecture dependent, in its
|
||||
* simplest form it is void.
|
||||
* @note Same as @p port_lock() in this port.
|
||||
*/
|
||||
#define port_unlock_from_isr() port_unlock()
|
||||
|
||||
/**
|
||||
* @brief Disables all the interrupt sources.
|
||||
*/
|
||||
#define port_disable() asm volatile ("cpsid i" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Disables the interrupt sources below kernel-level priority.
|
||||
*/
|
||||
#define port_suspend() asm volatile ("cpsid i" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Enables all the interrupt sources.
|
||||
*/
|
||||
#define port_enable() asm volatile ("cpsie i" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Enters an architecture-dependent IRQ-waiting mode.
|
||||
* @details The function is meant to return when an interrupt becomes pending.
|
||||
* The simplest implementation is an empty function or macro but this
|
||||
* would not take advantage of architecture-specific power saving
|
||||
* modes.
|
||||
* @note Implemented as an inlined @p WFI instruction.
|
||||
*/
|
||||
#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
|
||||
#define port_wait_for_interrupt() asm volatile ("wfi" : : : "memory")
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
* is responsible for the context switch between 2 threads.
|
||||
* @note The implementation of this code affects <b>directly</b> the context
|
||||
* switch performance so optimize here as much as you can.
|
||||
*
|
||||
* @param[in] ntp the thread to be switched in
|
||||
* @param[in] otp the thread to be switched out
|
||||
*/
|
||||
#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
|
||||
#define port_switch(ntp, otp) _port_switch(ntp, otp)
|
||||
#else
|
||||
#define port_switch(ntp, otp) { \
|
||||
register struct intctx *r13 asm ("r13"); \
|
||||
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
|
||||
chDbgPanic("stack overflow"); \
|
||||
_port_switch(ntp, otp); \
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void port_halt(void);
|
||||
void _port_irq_epilogue(regarm_t lr);
|
||||
void _port_switch_from_isr(void);
|
||||
void _port_exit_from_isr(void);
|
||||
void _port_switch(Thread *ntp, Thread *otp);
|
||||
void _port_thread_start(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _CHCORE_V6M_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,260 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chcore_v7m.c
|
||||
* @brief ARMv7-M architecture port code.
|
||||
*
|
||||
* @addtogroup ARMCMx_V7M_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System Timer vector.
|
||||
* @details This interrupt is used as system tick.
|
||||
* @note The timer must be initialized in the startup code.
|
||||
*/
|
||||
CH_IRQ_HANDLER(SysTickVector) {
|
||||
|
||||
CH_IRQ_PROLOGUE();
|
||||
|
||||
chSysLockFromIsr();
|
||||
chSysTimerHandlerI();
|
||||
chSysUnlockFromIsr();
|
||||
|
||||
CH_IRQ_EPILOGUE();
|
||||
}
|
||||
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief SVCall vector.
|
||||
* @details The SVCall vector is used for exception mode re-entering after a
|
||||
* context switch.
|
||||
* @note The SVCallVector vector is only used in advanced kernel mode.
|
||||
*/
|
||||
void SVCallVector(void) {
|
||||
struct extctx *ctxp;
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
/* Enforcing unstacking of the FP part of the context.*/
|
||||
SCB_FPCCR &= ~FPCCR_LSPACT;
|
||||
#endif
|
||||
|
||||
/* Current PSP value.*/
|
||||
asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
|
||||
|
||||
/* Discarding the current exception context and positioning the stack to
|
||||
point to the real one.*/
|
||||
ctxp++;
|
||||
|
||||
/* Restoring real position of the original stack frame.*/
|
||||
asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
|
||||
port_unlock_from_isr();
|
||||
}
|
||||
#endif /* !CORTEX_SIMPLIFIED_PRIORITY */
|
||||
|
||||
#if CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PendSV vector.
|
||||
* @details The PendSV vector is used for exception mode re-entering after a
|
||||
* context switch.
|
||||
* @note The PendSV vector is only used in compact kernel mode.
|
||||
*/
|
||||
void PendSVVector(void) {
|
||||
struct extctx *ctxp;
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
/* Enforcing unstacking of the FP part of the context.*/
|
||||
SCB_FPCCR &= ~FPCCR_LSPACT;
|
||||
#endif
|
||||
|
||||
/* Current PSP value.*/
|
||||
asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
|
||||
|
||||
/* Discarding the current exception context and positioning the stack to
|
||||
point to the real one.*/
|
||||
ctxp++;
|
||||
|
||||
/* Restoring real position of the original stack frame.*/
|
||||
asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
|
||||
}
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
void _port_init(void) {
|
||||
|
||||
/* Initialization of the vector table and priority related settings.*/
|
||||
SCB_VTOR = CORTEX_VTOR_INIT;
|
||||
SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(CORTEX_PRIGROUP_INIT);
|
||||
|
||||
/* Initialization of the system vectors used by the port.*/
|
||||
nvicSetSystemHandlerPriority(HANDLER_SVCALL,
|
||||
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL));
|
||||
nvicSetSystemHandlerPriority(HANDLER_PENDSV,
|
||||
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV));
|
||||
nvicSetSystemHandlerPriority(HANDLER_SYSTICK,
|
||||
CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK));
|
||||
}
|
||||
|
||||
#if !CH_OPTIMIZE_SPEED
|
||||
void _port_lock(void) {
|
||||
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL;
|
||||
asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory");
|
||||
}
|
||||
|
||||
void _port_unlock(void) {
|
||||
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED;
|
||||
asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory");
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Exception exit redirection to _port_switch_from_isr().
|
||||
*/
|
||||
void _port_irq_epilogue(void) {
|
||||
|
||||
port_lock_from_isr();
|
||||
if ((SCB_ICSR & ICSR_RETTOBASE) != 0) {
|
||||
struct extctx *ctxp;
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
/* Enforcing a lazy FPU state save. Note, it goes in the original
|
||||
context because the FPCAR register has not been modified.*/
|
||||
asm volatile ("vmrs APSR_nzcv, FPSCR" : : : "memory");
|
||||
#endif
|
||||
|
||||
/* Current PSP value.*/
|
||||
asm volatile ("mrs %0, PSP" : "=r" (ctxp) : : "memory");
|
||||
|
||||
/* Adding an artificial exception return context, there is no need to
|
||||
populate it fully.*/
|
||||
ctxp--;
|
||||
ctxp->xpsr = (regarm_t)0x01000000;
|
||||
#if CORTEX_USE_FPU
|
||||
ctxp->fpscr = (regarm_t)SCB_FPDSCR;
|
||||
#endif
|
||||
asm volatile ("msr PSP, %0" : : "r" (ctxp) : "memory");
|
||||
|
||||
/* The exit sequence is different depending on if a preemption is
|
||||
required or not.*/
|
||||
if (chSchIsPreemptionRequired()) {
|
||||
/* Preemption is required we need to enforce a context switch.*/
|
||||
ctxp->pc = (regarm_t)_port_switch_from_isr;
|
||||
}
|
||||
else {
|
||||
/* Preemption not required, we just need to exit the exception
|
||||
atomically.*/
|
||||
ctxp->pc = (regarm_t)_port_exit_from_isr;
|
||||
}
|
||||
|
||||
/* Note, returning without unlocking is intentional, this is done in
|
||||
order to keep the rest of the context switch atomic.*/
|
||||
return;
|
||||
}
|
||||
port_unlock_from_isr();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Post-IRQ switch code.
|
||||
* @details Exception handlers return here for context switching.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((naked))
|
||||
#endif
|
||||
void _port_switch_from_isr(void) {
|
||||
|
||||
dbg_check_lock();
|
||||
chSchDoReschedule();
|
||||
dbg_check_unlock();
|
||||
asm volatile ("_port_exit_from_isr:" : : : "memory");
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
asm volatile ("svc #0");
|
||||
#else /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
SCB_ICSR = ICSR_PENDSVSET;
|
||||
port_unlock();
|
||||
while (TRUE)
|
||||
;
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
* is responsible for the context switch between 2 threads.
|
||||
* @note The implementation of this code affects <b>directly</b> the context
|
||||
* switch performance so optimize here as much as you can.
|
||||
*
|
||||
* @param[in] ntp the thread to be switched in
|
||||
* @param[in] otp the thread to be switched out
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((naked))
|
||||
#endif
|
||||
void _port_switch(Thread *ntp, Thread *otp) {
|
||||
|
||||
asm volatile ("push {r4, r5, r6, r7, r8, r9, r10, r11, lr}"
|
||||
: : : "memory");
|
||||
#if CORTEX_USE_FPU
|
||||
asm volatile ("vpush {s16-s31}" : : : "memory");
|
||||
#endif
|
||||
|
||||
asm volatile ("str sp, [%1, #12] \n\t"
|
||||
"ldr sp, [%0, #12]" : : "r" (ntp), "r" (otp));
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
asm volatile ("vpop {s16-s31}" : : : "memory");
|
||||
#endif
|
||||
asm volatile ("pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}"
|
||||
: : : "memory");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start a thread by invoking its work function.
|
||||
* @details If the work function returns @p chThdExit() is automatically
|
||||
* invoked.
|
||||
*/
|
||||
void _port_thread_start(void) {
|
||||
|
||||
chSysUnlock();
|
||||
asm volatile ("mov r0, r5 \n\t"
|
||||
"blx r4 \n\t"
|
||||
"bl chThdExit");
|
||||
}
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,532 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chcore_v7m.h
|
||||
* @brief ARMv7-M architecture port macros and structures.
|
||||
*
|
||||
* @addtogroup ARMCMx_V7M_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCORE_V7M_H_
|
||||
#define _CHCORE_V7M_H_
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Disabled value for BASEPRI register.
|
||||
*/
|
||||
#define CORTEX_BASEPRI_DISABLED 0
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port configurable parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Stack size for the system idle thread.
|
||||
* @details This size depends on the idle thread implementation, usually
|
||||
* the idle thread should take no more space than those reserved
|
||||
* by @p PORT_INT_REQUIRED_STACK.
|
||||
* @note In this port it is set to 16 because the idle thread does have
|
||||
* a stack frame when compiling without optimizations. You may
|
||||
* reduce this value to zero when compiling with optimizations.
|
||||
*/
|
||||
#if !defined(PORT_IDLE_THREAD_STACK_SIZE)
|
||||
#define PORT_IDLE_THREAD_STACK_SIZE 16
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Per-thread stack overhead for interrupts servicing.
|
||||
* @details This constant is used in the calculation of the correct working
|
||||
* area size.
|
||||
* @note In this port this value is conservatively set to 64 because the
|
||||
* function @p chSchDoReschedule() can have a stack frame, especially
|
||||
* with compiler optimizations disabled. The value can be reduced
|
||||
* when compiler optimizations are enabled.
|
||||
*/
|
||||
#if !defined(PORT_INT_REQUIRED_STACK)
|
||||
#define PORT_INT_REQUIRED_STACK 64
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the use of the WFI instruction in the idle thread loop.
|
||||
*/
|
||||
#if !defined(CORTEX_ENABLE_WFI_IDLE)
|
||||
#define CORTEX_ENABLE_WFI_IDLE FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief SYSTICK handler priority.
|
||||
* @note The default SYSTICK handler priority is calculated as the priority
|
||||
* level in the middle of the numeric priorities range.
|
||||
*/
|
||||
#if !defined(CORTEX_PRIORITY_SYSTICK)
|
||||
#define CORTEX_PRIORITY_SYSTICK (CORTEX_PRIORITY_LEVELS >> 1)
|
||||
#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)
|
||||
/* If it is externally redefined then better perform a validity check on it.*/
|
||||
#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief FPU support in context switch.
|
||||
* @details Activating this option activates the FPU support in the kernel.
|
||||
*/
|
||||
#if !defined(CORTEX_USE_FPU)
|
||||
#define CORTEX_USE_FPU CORTEX_HAS_FPU
|
||||
#elif CORTEX_USE_FPU && !CORTEX_HAS_FPU
|
||||
/* This setting requires an FPU presence check in case it is externally
|
||||
redefined.*/
|
||||
#error "the selected core does not have an FPU"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Simplified priority handling flag.
|
||||
* @details Activating this option makes the Kernel work in compact mode.
|
||||
*/
|
||||
#if !defined(CORTEX_SIMPLIFIED_PRIORITY)
|
||||
#define CORTEX_SIMPLIFIED_PRIORITY FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief SVCALL handler priority.
|
||||
* @note The default SVCALL handler priority is defaulted to
|
||||
* @p CORTEX_MAXIMUM_PRIORITY+1, this reserves the
|
||||
* @p CORTEX_MAXIMUM_PRIORITY priority level as fast interrupts
|
||||
* priority level.
|
||||
*/
|
||||
#if !defined(CORTEX_PRIORITY_SVCALL)
|
||||
#define CORTEX_PRIORITY_SVCALL (CORTEX_MAXIMUM_PRIORITY + 1)
|
||||
#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SVCALL)
|
||||
/* If it is externally redefined then better perform a validity check on it.*/
|
||||
#error "invalid priority level specified for CORTEX_PRIORITY_SVCALL"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief NVIC VTOR initialization expression.
|
||||
*/
|
||||
#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
|
||||
#define CORTEX_VTOR_INIT 0x00000000
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief NVIC PRIGROUP initialization expression.
|
||||
* @details The default assigns all available priority bits as preemption
|
||||
* priority with no sub-priority.
|
||||
*/
|
||||
#if !defined(CORTEX_PRIGROUP_INIT) || defined(__DOXYGEN__)
|
||||
#define CORTEX_PRIGROUP_INIT (7 - CORTEX_PRIORITY_BITS)
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port derived parameters. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Maximum usable priority for normal ISRs.
|
||||
*/
|
||||
#define CORTEX_MAX_KERNEL_PRIORITY (CORTEX_PRIORITY_SVCALL + 1)
|
||||
|
||||
/**
|
||||
* @brief BASEPRI level within kernel lock.
|
||||
* @note In compact kernel mode this constant value is enforced to zero.
|
||||
*/
|
||||
#define CORTEX_BASEPRI_KERNEL \
|
||||
CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
|
||||
#else
|
||||
|
||||
#define CORTEX_MAX_KERNEL_PRIORITY 1
|
||||
#define CORTEX_BASEPRI_KERNEL 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PendSV priority level.
|
||||
* @note This priority is enforced to be equal to
|
||||
* @p CORTEX_MAX_KERNEL_PRIORITY, this handler always have the
|
||||
* highest priority that cannot preempt the kernel.
|
||||
*/
|
||||
#define CORTEX_PRIORITY_PENDSV CORTEX_MAX_KERNEL_PRIORITY
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port exported info. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (CORTEX_MODEL == CORTEX_M3) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Macro defining the specific ARM architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_ARM_v7M
|
||||
|
||||
/**
|
||||
* @brief Name of the implemented architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_NAME "ARMv7-M"
|
||||
|
||||
/**
|
||||
* @brief Name of the architecture variant.
|
||||
*/
|
||||
#define CH_CORE_VARIANT_NAME "Cortex-M3"
|
||||
|
||||
#elif (CORTEX_MODEL == CORTEX_M4)
|
||||
#define CH_ARCHITECTURE_ARM_v7ME
|
||||
#define CH_ARCHITECTURE_NAME "ARMv7-ME"
|
||||
#if CORTEX_USE_FPU
|
||||
#define CH_CORE_VARIANT_NAME "Cortex-M4F"
|
||||
#else
|
||||
#define CH_CORE_VARIANT_NAME "Cortex-M4"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Port-specific information string.
|
||||
*/
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
#define CH_PORT_INFO "Advanced kernel mode"
|
||||
#else
|
||||
#define CH_PORT_INFO "Compact kernel mode"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port implementation part. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
||||
/**
|
||||
* @brief Generic ARM register.
|
||||
*/
|
||||
typedef void *regarm_t;
|
||||
|
||||
/* The documentation of the following declarations is in chconf.h in order
|
||||
to not have duplicated structure names into the documentation.*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
typedef uint64_t stkalign_t __attribute__ ((aligned (8)));
|
||||
|
||||
struct extctx {
|
||||
regarm_t r0;
|
||||
regarm_t r1;
|
||||
regarm_t r2;
|
||||
regarm_t r3;
|
||||
regarm_t r12;
|
||||
regarm_t lr_thd;
|
||||
regarm_t pc;
|
||||
regarm_t xpsr;
|
||||
#if CORTEX_USE_FPU
|
||||
regarm_t s0;
|
||||
regarm_t s1;
|
||||
regarm_t s2;
|
||||
regarm_t s3;
|
||||
regarm_t s4;
|
||||
regarm_t s5;
|
||||
regarm_t s6;
|
||||
regarm_t s7;
|
||||
regarm_t s8;
|
||||
regarm_t s9;
|
||||
regarm_t s10;
|
||||
regarm_t s11;
|
||||
regarm_t s12;
|
||||
regarm_t s13;
|
||||
regarm_t s14;
|
||||
regarm_t s15;
|
||||
regarm_t fpscr;
|
||||
regarm_t reserved;
|
||||
#endif /* CORTEX_USE_FPU */
|
||||
};
|
||||
|
||||
struct intctx {
|
||||
#if CORTEX_USE_FPU
|
||||
regarm_t s16;
|
||||
regarm_t s17;
|
||||
regarm_t s18;
|
||||
regarm_t s19;
|
||||
regarm_t s20;
|
||||
regarm_t s21;
|
||||
regarm_t s22;
|
||||
regarm_t s23;
|
||||
regarm_t s24;
|
||||
regarm_t s25;
|
||||
regarm_t s26;
|
||||
regarm_t s27;
|
||||
regarm_t s28;
|
||||
regarm_t s29;
|
||||
regarm_t s30;
|
||||
regarm_t s31;
|
||||
#endif /* CORTEX_USE_FPU */
|
||||
regarm_t r4;
|
||||
regarm_t r5;
|
||||
regarm_t r6;
|
||||
regarm_t r7;
|
||||
regarm_t r8;
|
||||
regarm_t r9;
|
||||
regarm_t r10;
|
||||
regarm_t r11;
|
||||
regarm_t lr;
|
||||
};
|
||||
|
||||
#endif /* !defined(__DOXYGEN__) */
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p Thread structure.
|
||||
* @details In this port the structure just holds a pointer to the @p intctx
|
||||
* structure representing the stack pointer at context switch time.
|
||||
*/
|
||||
struct context {
|
||||
struct intctx *r13;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p chThdCreateI() API.
|
||||
* @details This code usually setup the context switching frame represented
|
||||
* by an @p intctx structure.
|
||||
*/
|
||||
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
|
||||
tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \
|
||||
wsize - \
|
||||
sizeof(struct intctx)); \
|
||||
tp->p_ctx.r13->r4 = (void *)(pf); \
|
||||
tp->p_ctx.r13->r5 = (void *)(arg); \
|
||||
tp->p_ctx.r13->lr = (void *)(_port_thread_start); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enforces a correct alignment for a stack area size value.
|
||||
*/
|
||||
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
|
||||
|
||||
/**
|
||||
* @brief Computes the thread working area global size.
|
||||
*/
|
||||
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
|
||||
sizeof(struct intctx) + \
|
||||
sizeof(struct extctx) + \
|
||||
(n) + (PORT_INT_REQUIRED_STACK))
|
||||
|
||||
/**
|
||||
* @brief Static working area allocation.
|
||||
* @details This macro is used to allocate a static thread working area
|
||||
* aligned as both position and size.
|
||||
*/
|
||||
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
|
||||
|
||||
/**
|
||||
* @brief IRQ prologue code.
|
||||
* @details This macro must be inserted at the start of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_PROLOGUE()
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
* @details This macro must be inserted at the end of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_EPILOGUE() _port_irq_epilogue()
|
||||
|
||||
/**
|
||||
* @brief IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#define PORT_IRQ_HANDLER(id) void id(void)
|
||||
|
||||
/**
|
||||
* @brief Fast IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#define PORT_FAST_IRQ_HANDLER(id) void id(void)
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
*/
|
||||
#define port_init() _port_init()
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action.
|
||||
* @details Usually this function just disables interrupts but may perform
|
||||
* more actions.
|
||||
* @note In this port this it raises the base priority to kernel level.
|
||||
*/
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
#if CH_OPTIMIZE_SPEED || defined(__DOXYGEN__)
|
||||
#define port_lock() { \
|
||||
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; \
|
||||
asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); \
|
||||
}
|
||||
#else /* !CH_OPTIMIZE_SPEED */
|
||||
#define port_lock() { \
|
||||
asm volatile ("bl _port_lock" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#endif /* !CH_OPTIMIZE_SPEED */
|
||||
#else /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
#define port_lock() asm volatile ("cpsid i" : : : "memory")
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action.
|
||||
* @details Usually this function just enables interrupts but may perform
|
||||
* more actions.
|
||||
* @note In this port this it lowers the base priority to user level.
|
||||
*/
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
#if CH_OPTIMIZE_SPEED || defined(__DOXYGEN__)
|
||||
#define port_unlock() { \
|
||||
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; \
|
||||
asm volatile ("msr BASEPRI, %0" : : "r" (tmp) : "memory"); \
|
||||
}
|
||||
#else /* !CH_OPTIMIZE_SPEED */
|
||||
#define port_unlock() { \
|
||||
asm volatile ("bl _port_unlock" : : : "r3", "lr", "memory"); \
|
||||
}
|
||||
#endif /* !CH_OPTIMIZE_SPEED */
|
||||
#else /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
#define port_unlock() asm volatile ("cpsie i" : : : "memory")
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action from an interrupt handler.
|
||||
* @details This function is invoked before invoking I-class APIs from
|
||||
* interrupt handlers. The implementation is architecture dependent,
|
||||
* in its simplest form it is void.
|
||||
* @note Same as @p port_lock() in this port.
|
||||
*/
|
||||
#define port_lock_from_isr() port_lock()
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action from an interrupt handler.
|
||||
* @details This function is invoked after invoking I-class APIs from interrupt
|
||||
* handlers. The implementation is architecture dependent, in its
|
||||
* simplest form it is void.
|
||||
* @note Same as @p port_unlock() in this port.
|
||||
*/
|
||||
#define port_unlock_from_isr() port_unlock()
|
||||
|
||||
/**
|
||||
* @brief Disables all the interrupt sources.
|
||||
* @note Of course non-maskable interrupt sources are not included.
|
||||
* @note In this port it disables all the interrupt sources by raising
|
||||
* the priority mask to level 0.
|
||||
*/
|
||||
#define port_disable() asm volatile ("cpsid i" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Disables the interrupt sources below kernel-level priority.
|
||||
* @note Interrupt sources above kernel level remains enabled.
|
||||
* @note In this port it raises/lowers the base priority to kernel level.
|
||||
*/
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
#define port_suspend() { \
|
||||
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_KERNEL; \
|
||||
asm volatile ("msr BASEPRI, %0 \n\t" \
|
||||
"cpsie i" : : "r" (tmp) : "memory"); \
|
||||
}
|
||||
#else /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
#define port_suspend() asm volatile ("cpsid i" : : : "memory")
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
|
||||
/**
|
||||
* @brief Enables all the interrupt sources.
|
||||
* @note In this port it lowers the base priority to user level.
|
||||
*/
|
||||
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
|
||||
#define port_enable() { \
|
||||
register uint32_t tmp asm ("r3") = CORTEX_BASEPRI_DISABLED; \
|
||||
asm volatile ("msr BASEPRI, %0 \n\t" \
|
||||
"cpsie i" : : "r" (tmp) : "memory"); \
|
||||
}
|
||||
#else /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
#define port_enable() asm volatile ("cpsie i" : : : "memory")
|
||||
#endif /* CORTEX_SIMPLIFIED_PRIORITY */
|
||||
|
||||
/**
|
||||
* @brief Enters an architecture-dependent IRQ-waiting mode.
|
||||
* @details The function is meant to return when an interrupt becomes pending.
|
||||
* The simplest implementation is an empty function or macro but this
|
||||
* would not take advantage of architecture-specific power saving
|
||||
* modes.
|
||||
* @note Implemented as an inlined @p WFI instruction.
|
||||
*/
|
||||
#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)
|
||||
#define port_wait_for_interrupt() { \
|
||||
asm volatile ("wfi" : : : "memory"); \
|
||||
}
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
* is responsible for the context switch between 2 threads.
|
||||
* @note The implementation of this code affects <b>directly</b> the context
|
||||
* switch performance so optimize here as much as you can.
|
||||
*
|
||||
* @param[in] ntp the thread to be switched in
|
||||
* @param[in] otp the thread to be switched out
|
||||
*/
|
||||
#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
|
||||
#define port_switch(ntp, otp) _port_switch(ntp, otp)
|
||||
#else
|
||||
#define port_switch(ntp, otp) { \
|
||||
register struct intctx *r13 asm ("r13"); \
|
||||
if ((stkalign_t *)(r13 - 1) < otp->p_stklimit) \
|
||||
chDbgPanic("stack overflow"); \
|
||||
_port_switch(ntp, otp); \
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void port_halt(void);
|
||||
void _port_init(void);
|
||||
void _port_irq_epilogue(void);
|
||||
void _port_switch_from_isr(void);
|
||||
void _port_exit_from_isr(void);
|
||||
void _port_switch(Thread *ntp, Thread *otp);
|
||||
void _port_thread_start(void);
|
||||
#if !CH_OPTIMIZE_SPEED
|
||||
void _port_lock(void);
|
||||
void _port_unlock(void);
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _CHCORE_V7M_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,92 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file GCC/ARMCMx/chtypes.h
|
||||
* @brief ARM Cortex-Mx port system types.
|
||||
*
|
||||
* @addtogroup ARMCMx_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHTYPES_H_
|
||||
#define _CHTYPES_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
typedef bool bool_t; /**< Fast boolean type. */
|
||||
typedef uint8_t tmode_t; /**< Thread flags. */
|
||||
typedef uint8_t tstate_t; /**< Thread state. */
|
||||
typedef uint8_t trefs_t; /**< Thread references counter. */
|
||||
typedef uint8_t tslices_t; /**< Thread time slices counter. */
|
||||
typedef uint32_t tprio_t; /**< Thread priority. */
|
||||
typedef int32_t msg_t; /**< Inter-thread message. */
|
||||
typedef int32_t eventid_t; /**< Event Id. */
|
||||
typedef uint32_t eventmask_t; /**< Event mask. */
|
||||
typedef uint32_t flagsmask_t; /**< Event flags. */
|
||||
typedef uint32_t systime_t; /**< System time. */
|
||||
typedef int32_t cnt_t; /**< Resources counter. */
|
||||
|
||||
/**
|
||||
* @brief Inline function modifier.
|
||||
*/
|
||||
#define INLINE inline
|
||||
|
||||
/**
|
||||
* @brief ROM constant modifier.
|
||||
* @note It is set to use the "const" keyword in this port.
|
||||
*/
|
||||
#define ROMCONST const
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (within).
|
||||
* @note It uses the "packed" GCC attribute.
|
||||
*/
|
||||
#define PACK_STRUCT_STRUCT __attribute__((packed))
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (before).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_BEGIN
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (after).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_END
|
||||
|
||||
/**
|
||||
* @brief Packed variable specifier.
|
||||
*/
|
||||
#define PACKED_VAR __attribute__((packed))
|
||||
|
||||
#endif /* _CHTYPES_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,361 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file ARMCMx/crt0.c
|
||||
* @brief Generic ARMvx-M (Cortex-M0/M1/M3/M4) startup file for ChibiOS/RT.
|
||||
*
|
||||
* @addtogroup ARMCMx_STARTUP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#if !defined(FALSE)
|
||||
#define FALSE 0
|
||||
#endif
|
||||
|
||||
#if !defined(TRUE)
|
||||
#define TRUE (!FALSE)
|
||||
#endif
|
||||
|
||||
#define SCB_CPACR *((uint32_t *)0xE000ED88U)
|
||||
#define SCB_FPCCR *((uint32_t *)0xE000EF34U)
|
||||
#define SCB_FPDSCR *((uint32_t *)0xE000EF3CU)
|
||||
#define FPCCR_ASPEN (0x1U << 31)
|
||||
#define FPCCR_LSPEN (0x1U << 30)
|
||||
|
||||
typedef void (*funcp_t)(void);
|
||||
typedef funcp_t * funcpp_t;
|
||||
|
||||
#define SYMVAL(sym) (uint32_t)(((uint8_t *)&(sym)) - ((uint8_t *)0))
|
||||
|
||||
/*
|
||||
* Area fill code, it is a macro because here functions cannot be called
|
||||
* until stacks are initialized.
|
||||
*/
|
||||
#define fill32(start, end, filler) { \
|
||||
uint32_t *p1 = start; \
|
||||
uint32_t *p2 = end; \
|
||||
while (p1 < p2) \
|
||||
*p1++ = filler; \
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Startup settings
|
||||
* @{
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Control special register initialization value.
|
||||
* @details The system is setup to run in privileged mode using the PSP
|
||||
* stack (dual stack mode).
|
||||
*/
|
||||
#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__)
|
||||
#define CRT0_CONTROL_INIT 0x00000002
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Stack segments initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
|
||||
#define CRT0_STACKS_FILL_PATTERN 0x55555555
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Stack segments initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__)
|
||||
#define CRT0_INIT_STACKS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief DATA segment initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__)
|
||||
#define CRT0_INIT_DATA TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief BSS segment initialization switch.
|
||||
*/
|
||||
#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__)
|
||||
#define CRT0_INIT_BSS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Constructors invocation switch.
|
||||
*/
|
||||
#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__)
|
||||
#define CRT0_CALL_CONSTRUCTORS TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Destructors invocation switch.
|
||||
*/
|
||||
#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__)
|
||||
#define CRT0_CALL_DESTRUCTORS TRUE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/**
|
||||
* @name Symbols from the scatter file
|
||||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Main stack lower boundary.
|
||||
* @details This symbol must be exported by the linker script and represents
|
||||
* the main stack lower boundary.
|
||||
*/
|
||||
extern uint32_t __main_stack_base__;
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief Main stack initial position.
|
||||
* @details This symbol must be exported by the linker script and represents
|
||||
* the main stack initial position.
|
||||
*/
|
||||
extern uint32_t __main_stack_end__;
|
||||
|
||||
/**
|
||||
* @brief Process stack lower boundary.
|
||||
* @details This symbol must be exported by the linker script and represents
|
||||
* the process stack lower boundary.
|
||||
*/
|
||||
extern uint32_t __process_stack_base__;
|
||||
|
||||
/**
|
||||
* @brief Process stack initial position.
|
||||
* @details This symbol must be exported by the linker script and represents
|
||||
* the process stack initial position.
|
||||
*/
|
||||
extern uint32_t __process_stack_end__;
|
||||
|
||||
/**
|
||||
* @brief ROM image of the data segment start.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern uint32_t _textdata;
|
||||
|
||||
/**
|
||||
* @brief Data segment start.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern uint32_t _data;
|
||||
|
||||
/**
|
||||
* @brief Data segment end.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern uint32_t _edata;
|
||||
|
||||
/**
|
||||
* @brief BSS segment start.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern uint32_t _bss_start;
|
||||
|
||||
/**
|
||||
* @brief BSS segment end.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern uint32_t _bss_end;
|
||||
|
||||
/**
|
||||
* @brief Constructors table start.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern funcp_t __init_array_start;
|
||||
|
||||
/**
|
||||
* @brief Constructors table end.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern funcp_t __init_array_end;
|
||||
|
||||
/**
|
||||
* @brief Destructors table start.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern funcp_t __fini_array_start;
|
||||
|
||||
/**
|
||||
* @brief Destructors table end.
|
||||
* @pre The symbol must be aligned to a 32 bits boundary.
|
||||
*/
|
||||
extern funcp_t __fini_array_end;
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief Application @p main() function.
|
||||
*/
|
||||
extern void main(void);
|
||||
|
||||
/**
|
||||
* @brief Early initialization.
|
||||
* @details This hook is invoked immediately after the stack initialization
|
||||
* and before the DATA and BSS segments initialization. The
|
||||
* default behavior is to do nothing.
|
||||
* @note This function is a weak symbol.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((weak))
|
||||
#endif
|
||||
void __early_init(void) {}
|
||||
|
||||
/**
|
||||
* @brief Late initialization.
|
||||
* @details This hook is invoked after the DATA and BSS segments
|
||||
* initialization and before any static constructor. The
|
||||
* default behavior is to do nothing.
|
||||
* @note This function is a weak symbol.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((weak))
|
||||
#endif
|
||||
void __late_init(void) {}
|
||||
|
||||
/**
|
||||
* @brief Default @p main() function exit handler.
|
||||
* @details This handler is invoked or the @p main() function exit. The
|
||||
* default behavior is to enter an infinite loop.
|
||||
* @note This function is a weak symbol.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((weak, naked))
|
||||
#endif
|
||||
void _default_exit(void) {
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Reset vector.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((naked))
|
||||
#endif
|
||||
void ResetHandler(void) {
|
||||
uint32_t psp, reg;
|
||||
|
||||
/* Process Stack initialization, it is allocated starting from the
|
||||
symbol __process_stack_end__ and its lower limit is the symbol
|
||||
__process_stack_base__.*/
|
||||
asm volatile ("cpsid i");
|
||||
psp = SYMVAL(__process_stack_end__);
|
||||
asm volatile ("msr PSP, %0" : : "r" (psp));
|
||||
|
||||
#if CORTEX_USE_FPU
|
||||
/* Initializing the FPU context save in lazy mode.*/
|
||||
SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
|
||||
|
||||
/* CP10 and CP11 set to full access.*/
|
||||
SCB_CPACR |= 0x00F00000;
|
||||
|
||||
/* FPSCR and FPDSCR initially zero.*/
|
||||
reg = 0;
|
||||
asm volatile ("vmsr FPSCR, %0" : : "r" (reg) : "memory");
|
||||
SCB_FPDSCR = reg;
|
||||
|
||||
/* CPU mode initialization, enforced FPCA bit.*/
|
||||
reg = CRT0_CONTROL_INIT | 4;
|
||||
#else
|
||||
/* CPU mode initialization.*/
|
||||
reg = CRT0_CONTROL_INIT;
|
||||
#endif
|
||||
asm volatile ("msr CONTROL, %0" : : "r" (reg));
|
||||
asm volatile ("isb");
|
||||
|
||||
#if CRT0_INIT_STACKS
|
||||
/* Main and Process stacks initialization.*/
|
||||
fill32(&__main_stack_base__,
|
||||
&__main_stack_end__,
|
||||
CRT0_STACKS_FILL_PATTERN);
|
||||
fill32(&__process_stack_base__,
|
||||
&__process_stack_end__,
|
||||
CRT0_STACKS_FILL_PATTERN);
|
||||
#endif
|
||||
|
||||
/* Early initialization hook invocation.*/
|
||||
__early_init();
|
||||
|
||||
#if CRT0_INIT_DATA
|
||||
/* DATA segment initialization.*/
|
||||
{
|
||||
uint32_t *tp, *dp;
|
||||
|
||||
tp = &_textdata;
|
||||
dp = &_data;
|
||||
while (dp < &_edata)
|
||||
*dp++ = *tp++;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if CRT0_INIT_BSS
|
||||
/* BSS segment initialization.*/
|
||||
fill32(&_bss_start, &_bss_end, 0);
|
||||
#endif
|
||||
|
||||
/* Late initialization hook invocation.*/
|
||||
__late_init();
|
||||
|
||||
#if CRT0_CALL_CONSTRUCTORS
|
||||
/* Constructors invocation.*/
|
||||
{
|
||||
funcpp_t fpp = &__init_array_start;
|
||||
while (fpp < &__init_array_end) {
|
||||
(*fpp)();
|
||||
fpp++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Invoking application main() function.*/
|
||||
main();
|
||||
|
||||
#if CRT0_CALL_DESTRUCTORS
|
||||
/* Destructors invocation.*/
|
||||
{
|
||||
funcpp_t fpp = &__fini_array_start;
|
||||
while (fpp < &__fini_array_end) {
|
||||
(*fpp)();
|
||||
fpp++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Invoking the exit handler.*/
|
||||
_default_exit();
|
||||
}
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,258 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx ARM Cortex-Mx
|
||||
* @details ARM Cortex-Mx port for the GCC compiler.
|
||||
*
|
||||
* @section ARMCMx_INTRO Introduction
|
||||
* This port supports all the cores implementing the ARMv6-M and ARMv7-M
|
||||
* architectures.
|
||||
*
|
||||
* @section ARMCMx_MODES Kernel Modes
|
||||
* The Cortex-Mx port supports two distinct kernel modes:
|
||||
* - <b>Advanced Kernel</b> mode. In this mode the kernel only masks
|
||||
* interrupt sources with priorities below or equal to the
|
||||
* @p CORTEX_BASEPRI_KERNEL level. Higher priorities are not affected by
|
||||
* the kernel critical sections and can be used for fast interrupts.
|
||||
* This mode is not available in the ARMv6-M architecture which does not
|
||||
* support priority masking.
|
||||
* - <b>Compact Kernel</b> mode. In this mode the kernel handles IRQ priorities
|
||||
* in a simplified way, all interrupt sources are disabled when the kernel
|
||||
* enters into a critical zone and re-enabled on exit. This is simple and
|
||||
* adequate for most applications, this mode results in a more compact and
|
||||
* faster kernel.
|
||||
* .
|
||||
* The selection of the mode is performed using the port configuration option
|
||||
* @p CORTEX_SIMPLIFIED_PRIORITY. Apart from the different handling of
|
||||
* interrupts there are no other differences between the two modes. The
|
||||
* kernel API is exactly the same.
|
||||
*
|
||||
* @section ARMCMx_STATES_A System logical states in Compact Kernel mode
|
||||
* The ChibiOS/RT logical @ref system_states are mapped as follow in Compact
|
||||
* Kernel mode:
|
||||
* - <b>Init</b>. This state is represented by the startup code and the
|
||||
* initialization code before @p chSysInit() is executed. It has not a
|
||||
* special hardware state associated.
|
||||
* - <b>Normal</b>. This is the state the system has after executing
|
||||
* @p chSysInit(). In this state interrupts are enabled. The processor
|
||||
* is running in thread-privileged mode.
|
||||
* - <b>Suspended</b>. In this state the interrupt sources are globally
|
||||
* disabled. The processor is running in thread-privileged mode. In this
|
||||
* mode this state is not different from the <b>Disabled</b> state.
|
||||
* - <b>Disabled</b>. In this state the interrupt sources are globally
|
||||
* disabled. The processor is running in thread-privileged mode. In this
|
||||
* mode this state is not different from the <b>Suspended</b> state.
|
||||
* - <b>Sleep</b>. This state is entered with the execution of the specific
|
||||
* instruction @p <b>wfi</b>.
|
||||
* - <b>S-Locked</b>. In this state the interrupt sources are globally
|
||||
* disabled. The processor is running in thread-privileged mode.
|
||||
* - <b>I-Locked</b>. In this state the interrupt sources are globally
|
||||
* disabled. The processor is running in exception-privileged mode.
|
||||
* - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
|
||||
* not globally masked but only interrupts with higher priority can preempt
|
||||
* the current handler. The processor is running in exception-privileged
|
||||
* mode.
|
||||
* - <b>Serving Fast Interrupt</b>. Not implemented in compact kernel mode.
|
||||
* - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
|
||||
* asynchronous NMI vector and several synchronous fault vectors that can
|
||||
* be considered belonging to this category.
|
||||
* - <b>Halted</b>. Implemented as an infinite loop after globally masking all
|
||||
* the maskable interrupt sources. The ARM state is whatever the processor
|
||||
* was running when @p chSysHalt() was invoked.
|
||||
*
|
||||
* @section ARMCMx_STATES_B System logical states in Advanced Kernel mode
|
||||
* The ChibiOS/RT logical @ref system_states are mapped as follow in the
|
||||
* Advanced Kernel mode:
|
||||
* - <b>Init</b>. This state is represented by the startup code and the
|
||||
* initialization code before @p chSysInit() is executed. It has not a
|
||||
* special hardware state associated.
|
||||
* - <b>Normal</b>. This is the state the system has after executing
|
||||
* @p chSysInit(). In this state the ARM Cortex-Mx has the BASEPRI register
|
||||
* set at @p CORTEX_BASEPRI_USER level, interrupts are not masked. The
|
||||
* processor is running in thread-privileged mode.
|
||||
* - <b>Suspended</b>. In this state the interrupt sources are not globally
|
||||
* masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
|
||||
* masking any interrupt source with lower or equal priority. The processor
|
||||
* is running in thread-privileged mode.
|
||||
* - <b>Disabled</b>. Interrupt sources are globally masked. The processor
|
||||
* is running in thread-privileged mode.
|
||||
* - <b>Sleep</b>. This state is entered with the execution of the specific
|
||||
* instruction @p <b>wfi</b>.
|
||||
* - <b>S-Locked</b>. In this state the interrupt sources are not globally
|
||||
* masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
|
||||
* masking any interrupt source with lower or equal priority. The processor
|
||||
* is running in thread-privileged mode.
|
||||
* - <b>I-Locked</b>. In this state the interrupt sources are not globally
|
||||
* masked but the BASEPRI register is set to @p CORTEX_BASEPRI_KERNEL thus
|
||||
* masking any interrupt source with lower or equal priority. The processor
|
||||
* is running in exception-privileged mode.
|
||||
* - <b>Serving Regular Interrupt</b>. In this state the interrupt sources are
|
||||
* not globally masked but only interrupts with higher priority can preempt
|
||||
* the current handler. The processor is running in exception-privileged
|
||||
* mode.
|
||||
* - <b>Serving Fast Interrupt</b>. Fast interrupts are defined as interrupt
|
||||
* sources having higher priority level than the kernel
|
||||
* (@p CORTEX_BASEPRI_KERNEL). In this state is not possible to switch to
|
||||
* the I-Locked state because fast interrupts can preempt the kernel
|
||||
* critical zone.<br>
|
||||
* This state is not implemented in the ARMv6-M implementation because
|
||||
* priority masking is not present in this architecture.
|
||||
* - <b>Serving Non-Maskable Interrupt</b>. The Cortex-Mx has a specific
|
||||
* asynchronous NMI vector and several synchronous fault vectors that can
|
||||
* be considered belonging to this category.
|
||||
* - <b>Halted</b>. Implemented as an infinite loop after globally masking all
|
||||
* the maskable interrupt sources. The ARM state is whatever the processor
|
||||
* was running when @p chSysHalt() was invoked.
|
||||
* .
|
||||
* @section ARMCMx_NOTES ARM Cortex-Mx/GCC port notes
|
||||
* The ARM Cortex-Mx port is organized as follow:
|
||||
* - The @p main() function is invoked in thread-privileged mode.
|
||||
* - Each thread has a private process stack, the system has a single main
|
||||
* stack where all the interrupts and exceptions are processed.
|
||||
* - The threads are started in thread-privileged mode.
|
||||
* - Interrupt nesting and the other advanced core/NVIC features are supported.
|
||||
* - The Cortex-Mx port is perfectly generic, support for more devices can be
|
||||
* easily added by adding a subdirectory under <tt>./os/ports/GCC/ARMCMx</tt>
|
||||
* and giving it the name of the new device, then copy the files from another
|
||||
* device into the new directory and customize them for the new device.
|
||||
* .
|
||||
* @ingroup gcc
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx_CONF Configuration Options
|
||||
* @details ARM Cortex-Mx Configuration Options. The ARMCMx port allows some
|
||||
* architecture-specific configurations settings that can be overridden
|
||||
* by redefining them in @p chconf.h. Usually there is no need to change
|
||||
* the default values.
|
||||
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space used
|
||||
* by an interrupt handler between the @p extctx and @p intctx
|
||||
* structures.
|
||||
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
||||
* thread. Usually there is no need to change this value unless inserting
|
||||
* code in the IDLE thread using the @p IDLE_LOOP_HOOK hook macro.
|
||||
* - @p CORTEX_PRIORITY_SYSTICK, priority of the SYSTICK handler.
|
||||
* - @p CORTEX_PRIORITY_PENDSV, priority of the PENDSV handler.
|
||||
* - @p CORTEX_ENABLE_WFI_IDLE, if set to @p TRUE enables the use of the
|
||||
* @p <b>wfi</b> instruction from within the idle loop. This option is
|
||||
* defaulted to FALSE because it can create problems with some debuggers.
|
||||
* Setting this option to TRUE reduces the system power requirements.
|
||||
* .
|
||||
* @section ARMCMx_CONF_1 ARMv6-M specific options
|
||||
* The following options are specific for the ARMv6-M architecture:
|
||||
* - @p CORTEX_ALTERNATE_SWITCH, when activated makes the OS use the PendSV
|
||||
* exception instead of NMI as preemption handler.
|
||||
* .
|
||||
* @section ARMCMx_CONF_2 ARMv7-M specific options
|
||||
* The following options are specific for the ARMv6-M architecture:
|
||||
* - @p CORTEX_PRIORITY_SVCALL, priority of the SVCALL handler.
|
||||
* - @p CORTEX_SIMPLIFIED_PRIORITY, when enabled activates the Compact kernel
|
||||
* mode.
|
||||
* .
|
||||
* @ingroup ARMCMx
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx_CORE Core Port Implementation
|
||||
* @details ARM Cortex-Mx specific port code, structures and macros.
|
||||
*
|
||||
* @ingroup ARMCMx
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx_V6M_CORE ARMv6-M Specific Implementation
|
||||
* @details ARMv6-M specific port code, structures and macros.
|
||||
*
|
||||
* @ingroup ARMCMx_CORE
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx_V7M_CORE ARMv7-M Specific Implementation
|
||||
* @details ARMv7-M specific port code, structures and macros.
|
||||
*
|
||||
* @ingroup ARMCMx_CORE
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx_STARTUP Startup Support
|
||||
* @details ChibiOS/RT provides its own generic startup file for the ARM
|
||||
* Cortex-Mx port.
|
||||
* Of course it is not mandatory to use it but care should be taken about the
|
||||
* startup phase details.
|
||||
*
|
||||
* @section ARMCMx_STARTUP_1 Startup Process
|
||||
* The startup process, as implemented, is the following:
|
||||
* -# Interrupts are masked globally.
|
||||
* -# The two stacks are initialized by assigning them the sizes defined in
|
||||
* the linker script (also known as scatter file).
|
||||
* -# The CPU state is switched to Privileged and the PSP stack is used.
|
||||
* -# An early initialization routine @p __early_init() is invoked, if the
|
||||
* symbol is not defined then an empty default routine is executed
|
||||
* (weak symbol).
|
||||
* -# DATA and BSS segments are initialized.
|
||||
* -# Constructors are invoked.
|
||||
* -# The @p main() function is invoked with no parameters.
|
||||
* -# Destructors are invoked.
|
||||
* -# A branch is performed to the weak symbol @p _default_exit(). The
|
||||
* default code is an endless empty loop.
|
||||
* .
|
||||
* @section ARMCMx_STARTUP_2 Expected linker symbols
|
||||
* The startup code starts at the symbol @p ResetHandler and expects the
|
||||
* following symbols to be defined in the linker script:
|
||||
* - @p __ram_end__, end of RAM.
|
||||
* - @p __main_stack_base__, main stack lower boundary.
|
||||
* - @p __main_stack_end__, main stack initial position.
|
||||
* - @p __process_stack_base__, process stack lower boundary.
|
||||
* - @p __process_stack_end__, process stack initial position.
|
||||
* - @p _textdata, address of the data segment source read only data.
|
||||
* - @p _data, start of the data segment.
|
||||
* - @p _edata, end of the data segment end location.
|
||||
* - @p _bss_start, start of the BSS.
|
||||
* - @p _bss_end, end of the BSS segment.
|
||||
* - @p __init_array_start, start of the constructors array.
|
||||
* - @p __init_array_end, end of the constructors array.
|
||||
* - @p __fini_array_start, start of the destructors array.
|
||||
* - @p __fini_array_end, end of the destructors array.
|
||||
* .
|
||||
* Additionally the kernel expects the following symbols:
|
||||
* - @p __main_thread_stack_base__, this symbol is required when the
|
||||
* stack checking is enabled (<tt>CH_DBG_ENABLE_STACK_CHECK==TRUE</tt>),
|
||||
* it is an alias of @p __process_stack_base__ in this port.
|
||||
* - @p __heap_base__ and @p __heap_end__, those symbols are required
|
||||
* if the memory core manager is enabled (<tt>CH_USE_MEMCORE==TRUE</tt>)
|
||||
* with a default core size set to zero (<tt>CH_MEMCORE_SIZE==0</tt>).
|
||||
* .
|
||||
* @ingroup ARMCMx
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup ARMCMx_SPECIFIC Specific Implementations
|
||||
* @details Platform-specific port code.
|
||||
*
|
||||
* @ingroup ARMCMx
|
||||
*/
|
||||
@ -0,0 +1,107 @@
|
||||
# ARM Cortex-Mx common makefile scripts and rules.
|
||||
|
||||
##############################################################################
|
||||
# Processing options coming from the upper Makefile.
|
||||
#
|
||||
|
||||
# Compiler options
|
||||
set(OPT ${USE_OPT})
|
||||
set(COPT ${USE_COPT})
|
||||
set(CPPOPT ${USE_CPPOPT})
|
||||
|
||||
# Garbage collection
|
||||
if(USE_LINK_GC STREQUAL "yes")
|
||||
set(OPT "${OPT} -ffunction-sections -fdata-sections -fno-common")
|
||||
set(LDOPT ",--gc-sections")
|
||||
else()
|
||||
set(LDOPT)
|
||||
endif()
|
||||
|
||||
# Linker extra options
|
||||
if(DEFINED USE_LDOPT)
|
||||
set(LDOPT "${LDOPT},${USE_LDOPT}")
|
||||
endif()
|
||||
|
||||
# Link time optimizations
|
||||
if(USE_LTO STREQUAL "yes")
|
||||
set(OPT "${OPT} -flto")
|
||||
endif()
|
||||
|
||||
# FPU-related options
|
||||
if(NOT DEFINED USE_FPU)
|
||||
set(USE_FPU no)
|
||||
endif()
|
||||
if(NOT USE_FPU STREQUAL "no")
|
||||
set(OPT "${OPT} -mfloat-abi=${USE_FPU} -mfpu=fpv4-sp-d16 -fsingle-precision-constant")
|
||||
set(DDEFS ${DDEFS} -DCORTEX_USE_FPU=TRUE)
|
||||
set(DADEFS ${DADEFS} -DCORTEX_USE_FPU=TRUE)
|
||||
else()
|
||||
set(DDEFS ${DDEFS} -DCORTEX_USE_FPU=FALSE)
|
||||
set(DADEFS ${DADEFS} -DCORTEX_USE_FPU=FALSE)
|
||||
endif()
|
||||
|
||||
# Source files groups and paths
|
||||
if(USE_THUMB STREQUAL "yes")
|
||||
set(TCSRC ${TCSRC} ${CSRC})
|
||||
set(TCPPSRC ${TCPPSRC} ${CPPSRC})
|
||||
else()
|
||||
set(ACSRC ${ACSRC} ${CSRC})
|
||||
set(ACPPSRC ${ACPPSRC} ${CPPSRC})
|
||||
endif()
|
||||
set(ASRC ${ACSRC} ${ACPPSRC})
|
||||
set(TSRC ${TCSRC} ${TCPPSRC})
|
||||
|
||||
# Paths
|
||||
set(IINCDIR ${INCDIR} ${DINCDIR} ${UINCDIR})
|
||||
set(LLIBDIR ${DLIBDIR} ${ULIBDIR})
|
||||
|
||||
# Macros
|
||||
set(DEFS ${DDEFS} ${UDEFS})
|
||||
set(ADEFS ${DADEFS} ${UADEFS})
|
||||
|
||||
# Libs
|
||||
set(LIBS ${DLIBS} ${ULIBS})
|
||||
|
||||
# Various settings
|
||||
set(MCFLAGS -mcpu=${MCU})
|
||||
set(ODFLAGS "-x --syms")
|
||||
set(ASFLAGS "${MCFLAGS} ${ADEFS}")
|
||||
set(ASXFLAGS "${MCFLAGS} ${ADEFS}")
|
||||
set(CFLAGS "${MCFLAGS} ${OPT} ${COPT} ${CWARN}")
|
||||
set(CPPFLAGS "${MCFLAGS} ${OPT} ${CPPOPT} ${CPPWARN}")
|
||||
set(LDFLAGS "-nostartfiles -Wl,--library-path=${RULESPATH},--script=${LDSCRIPT}${LDOPT}")
|
||||
|
||||
# Thumb interwork enabled only if needed because it kills performance.
|
||||
if(DEFINED TSRC)
|
||||
set(CFLAGS "${CFLAGS}")
|
||||
set(CPPFLAGS "${CPPFLAGS}")
|
||||
set(ASFLAGS "${ASFLAGS}")
|
||||
set(DEFS ${DEFS} -DTHUMB_PRESENT)
|
||||
set(ADEFS ${ADEFS} -DTHUMB_PRESENT)
|
||||
if(DEFINED ASRC)
|
||||
# Mixed ARM and THUMB mode.
|
||||
set(CFLAGS "${CFLAGS} -mthumb-interwork")
|
||||
set(CPPFLAGS "${CPPFLAGS} -mthumb-interwork")
|
||||
set(ASFLAGS "${ASFLAGS} -mthumb-interwork")
|
||||
set(LDFLAGS "${LDFLAGS} -mthumb-interwork")
|
||||
else()
|
||||
# Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
|
||||
set(CFLAGS "${CFLAGS} -mno-thumb-interwork")
|
||||
set(CPPFLAGS "${CPPFLAGS} -mno-thumb-interwork")
|
||||
set(ASFLAGS "${ASFLAGS} -mno-thumb-interwork -mthumb")
|
||||
set(LDFLAGS "${LDFLAGS} -mno-thumb-interwork -mthumb")
|
||||
set(DEFS ${DEFS} -DTHUMB_NO_INTERWORKING)
|
||||
set(ADEFS ${ADEFS} -DTHUMB_NO_INTERWORKING)
|
||||
endif()
|
||||
else()
|
||||
# Pure ARM mode
|
||||
set(CFLAGS "${CFLAGS} -mno-thumb-interwork")
|
||||
set(CPPFLAGS "${CPPFLAGS} -mno-thumb-interwork")
|
||||
set(ASFLAGS "${ASFLAGS} -mno-thumb-interwork")
|
||||
set(LDFLAGS "${LDFLAGS} -mno-thumb-interwork")
|
||||
endif()
|
||||
|
||||
set(CMAKE_C_FLAGS "${CFLAGS} ${TOPT}")
|
||||
set(CMAKE_CXX_FLAGS "${CPPFLAGS} ${TOPT}")
|
||||
set(CMAKE_AS_FLAGS "${ASFLAGS} ${TOPT}")
|
||||
set(CMAKE_EXE_LINKER_FLAGS "${LDFLAGS}")
|
||||
@ -0,0 +1,253 @@
|
||||
# ARM Cortex-Mx common makefile scripts and rules.
|
||||
|
||||
##############################################################################
|
||||
# Processing options coming from the upper Makefile.
|
||||
#
|
||||
|
||||
# Compiler options
|
||||
OPT = $(USE_OPT)
|
||||
COPT = $(USE_COPT)
|
||||
CPPOPT = $(USE_CPPOPT)
|
||||
|
||||
# Garbage collection
|
||||
ifeq ($(USE_LINK_GC),yes)
|
||||
OPT += -ffunction-sections -fdata-sections -fno-common
|
||||
LDOPT := ,--gc-sections
|
||||
else
|
||||
LDOPT :=
|
||||
endif
|
||||
|
||||
# Linker extra options
|
||||
ifneq ($(USE_LDOPT),)
|
||||
LDOPT := $(LDOPT),$(USE_LDOPT)
|
||||
endif
|
||||
|
||||
# Link time optimizations
|
||||
ifeq ($(USE_LTO),yes)
|
||||
OPT += -flto
|
||||
endif
|
||||
|
||||
# FPU-related options
|
||||
ifeq ($(USE_FPU),)
|
||||
USE_FPU = no
|
||||
endif
|
||||
ifneq ($(USE_FPU),no)
|
||||
OPT += -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 -fsingle-precision-constant
|
||||
DDEFS += -DCORTEX_USE_FPU=TRUE
|
||||
DADEFS += -DCORTEX_USE_FPU=TRUE
|
||||
else
|
||||
DDEFS += -DCORTEX_USE_FPU=FALSE
|
||||
DADEFS += -DCORTEX_USE_FPU=FALSE
|
||||
endif
|
||||
|
||||
# Output directory and files
|
||||
ifeq ($(BUILDDIR),)
|
||||
BUILDDIR = build
|
||||
endif
|
||||
ifeq ($(BUILDDIR),.)
|
||||
BUILDDIR = build
|
||||
endif
|
||||
OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
|
||||
$(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp
|
||||
|
||||
# Source files groups and paths
|
||||
ifeq ($(USE_THUMB),yes)
|
||||
TCSRC += $(CSRC)
|
||||
TCPPSRC += $(CPPSRC)
|
||||
else
|
||||
ACSRC += $(CSRC)
|
||||
ACPPSRC += $(CPPSRC)
|
||||
endif
|
||||
ASRC = $(ACSRC)$(ACPPSRC)
|
||||
TSRC = $(TCSRC)$(TCPPSRC)
|
||||
SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
|
||||
|
||||
# Various directories
|
||||
OBJDIR = $(BUILDDIR)/obj
|
||||
LSTDIR = $(BUILDDIR)/lst
|
||||
|
||||
# Object files groups
|
||||
ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
|
||||
ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
|
||||
TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
|
||||
TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
|
||||
ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
|
||||
ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
|
||||
OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
|
||||
|
||||
# Paths
|
||||
IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
|
||||
LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
|
||||
|
||||
# Macros
|
||||
DEFS = $(DDEFS) $(UDEFS)
|
||||
ADEFS = $(DADEFS) $(UADEFS)
|
||||
|
||||
# Libs
|
||||
LIBS = $(DLIBS) $(ULIBS)
|
||||
|
||||
# Various settings
|
||||
MCFLAGS = -mcpu=$(MCU)
|
||||
ODFLAGS = -x --syms
|
||||
ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
|
||||
ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
|
||||
CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
|
||||
CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
|
||||
LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH),--script=$(LDSCRIPT)$(LDOPT)
|
||||
|
||||
# Thumb interwork enabled only if needed because it kills performance.
|
||||
ifneq ($(TSRC),)
|
||||
CFLAGS += -DTHUMB_PRESENT
|
||||
CPPFLAGS += -DTHUMB_PRESENT
|
||||
ASFLAGS += -DTHUMB_PRESENT
|
||||
ifneq ($(ASRC),)
|
||||
# Mixed ARM and THUMB mode.
|
||||
CFLAGS += -mthumb-interwork
|
||||
CPPFLAGS += -mthumb-interwork
|
||||
ASFLAGS += -mthumb-interwork
|
||||
LDFLAGS += -mthumb-interwork
|
||||
else
|
||||
# Pure THUMB mode, THUMB C code cannot be called by ARM asm code directly.
|
||||
CFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
|
||||
CPPFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING
|
||||
ASFLAGS += -mno-thumb-interwork -DTHUMB_NO_INTERWORKING -mthumb
|
||||
LDFLAGS += -mno-thumb-interwork -mthumb
|
||||
endif
|
||||
else
|
||||
# Pure ARM mode
|
||||
CFLAGS += -mno-thumb-interwork
|
||||
CPPFLAGS += -mno-thumb-interwork
|
||||
ASFLAGS += -mno-thumb-interwork
|
||||
LDFLAGS += -mno-thumb-interwork
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
ASFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
CFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
CPPFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
|
||||
# Paths where to search for sources
|
||||
VPATH = $(SRCPATHS)
|
||||
|
||||
#
|
||||
# Makefile rules
|
||||
#
|
||||
|
||||
all: $(OBJS) $(OUTFILES) MAKE_ALL_RULE_HOOK
|
||||
|
||||
MAKE_ALL_RULE_HOOK:
|
||||
|
||||
$(OBJS): | $(BUILDDIR)
|
||||
|
||||
$(BUILDDIR) $(OBJDIR) $(LSTDIR):
|
||||
ifneq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo Compiler Options
|
||||
@echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
|
||||
@echo
|
||||
endif
|
||||
mkdir -p $(OBJDIR)
|
||||
mkdir -p $(LSTDIR)
|
||||
|
||||
$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
else
|
||||
@echo Compiling $(<F)
|
||||
@$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
|
||||
endif
|
||||
|
||||
%.elf: $(OBJS) $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
@echo
|
||||
$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
|
||||
else
|
||||
@echo Linking $@
|
||||
@$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
|
||||
endif
|
||||
|
||||
%.hex: %.elf $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
$(HEX) $< $@
|
||||
else
|
||||
@echo Creating $@
|
||||
@$(HEX) $< $@
|
||||
endif
|
||||
|
||||
%.bin: %.elf $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
$(BIN) $< $@
|
||||
else
|
||||
@echo Creating $@
|
||||
@$(BIN) $< $@
|
||||
endif
|
||||
|
||||
%.dmp: %.elf $(LDSCRIPT)
|
||||
ifeq ($(USE_VERBOSE_COMPILE),yes)
|
||||
$(OD) $(ODFLAGS) $< > $@
|
||||
else
|
||||
@echo Creating $@
|
||||
@$(OD) $(ODFLAGS) $< > $@
|
||||
@echo
|
||||
@$(SZ) $<
|
||||
@echo
|
||||
@echo Done
|
||||
endif
|
||||
|
||||
clean:
|
||||
@echo Cleaning
|
||||
-rm -fR .dep $(BUILDDIR)
|
||||
@echo
|
||||
@echo Done
|
||||
|
||||
#
|
||||
# Include the dependency files, should be the last of the makefile
|
||||
#
|
||||
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
|
||||
|
||||
# *** EOF ***
|
||||
@ -0,0 +1,140 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file AVR/chcore.c
|
||||
* @brief AVR architecture port code.
|
||||
*
|
||||
* @addtogroup AVR_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "ch.h"
|
||||
|
||||
/**
|
||||
* @brief Performs a context switch between two threads.
|
||||
* @details This is the most critical code in any port, this function
|
||||
* is responsible for the context switch between 2 threads.
|
||||
* @note The implementation of this code affects <b>directly</b> the context
|
||||
* switch performance so optimize here as much as you can.
|
||||
* @note The function is declared as a weak symbol, it is possible to
|
||||
* redefine it in your application code.
|
||||
*
|
||||
* @param[in] ntp the thread to be switched in
|
||||
* @param[in] otp the thread to be switched out
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((naked, weak))
|
||||
#endif
|
||||
void port_switch(Thread *ntp, Thread *otp) {
|
||||
|
||||
asm volatile ("push r2");
|
||||
asm volatile ("push r3");
|
||||
asm volatile ("push r4");
|
||||
asm volatile ("push r5");
|
||||
asm volatile ("push r6");
|
||||
asm volatile ("push r7");
|
||||
asm volatile ("push r8");
|
||||
asm volatile ("push r9");
|
||||
asm volatile ("push r10");
|
||||
asm volatile ("push r11");
|
||||
asm volatile ("push r12");
|
||||
asm volatile ("push r13");
|
||||
asm volatile ("push r14");
|
||||
asm volatile ("push r15");
|
||||
asm volatile ("push r16");
|
||||
asm volatile ("push r17");
|
||||
asm volatile ("push r28");
|
||||
asm volatile ("push r29");
|
||||
|
||||
asm volatile ("movw r30, r22");
|
||||
asm volatile ("in r0, 0x3d");
|
||||
asm volatile ("std Z+5, r0");
|
||||
asm volatile ("in r0, 0x3e");
|
||||
asm volatile ("std Z+6, r0");
|
||||
|
||||
asm volatile ("movw r30, r24");
|
||||
asm volatile ("ldd r0, Z+5");
|
||||
asm volatile ("out 0x3d, r0");
|
||||
asm volatile ("ldd r0, Z+6");
|
||||
asm volatile ("out 0x3e, r0");
|
||||
|
||||
asm volatile ("pop r29");
|
||||
asm volatile ("pop r28");
|
||||
asm volatile ("pop r17");
|
||||
asm volatile ("pop r16");
|
||||
asm volatile ("pop r15");
|
||||
asm volatile ("pop r14");
|
||||
asm volatile ("pop r13");
|
||||
asm volatile ("pop r12");
|
||||
asm volatile ("pop r11");
|
||||
asm volatile ("pop r10");
|
||||
asm volatile ("pop r9");
|
||||
asm volatile ("pop r8");
|
||||
asm volatile ("pop r7");
|
||||
asm volatile ("pop r6");
|
||||
asm volatile ("pop r5");
|
||||
asm volatile ("pop r4");
|
||||
asm volatile ("pop r3");
|
||||
asm volatile ("pop r2");
|
||||
asm volatile ("ret");
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Halts the system.
|
||||
* @details This function is invoked by the operating system when an
|
||||
* unrecoverable error is detected (for example because a programming
|
||||
* error in the application code that triggers an assertion while in
|
||||
* debug mode).
|
||||
* @note The function is declared as a weak symbol, it is possible to
|
||||
* redefine it in your application code.
|
||||
*/
|
||||
#if !defined(__DOXYGEN__)
|
||||
__attribute__((weak))
|
||||
#endif
|
||||
void port_halt(void) {
|
||||
|
||||
port_disable();
|
||||
while (TRUE) {
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Start a thread by invoking its work function.
|
||||
* @details If the work function returns @p chThdExit() is automatically
|
||||
* invoked.
|
||||
*/
|
||||
void _port_thread_start(void) {
|
||||
|
||||
chSysUnlock();
|
||||
asm volatile ("movw r24, r4");
|
||||
asm volatile ("movw r30, r2");
|
||||
asm volatile ("icall");
|
||||
asm volatile ("call chThdExit");
|
||||
}
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,332 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file AVR/chcore.h
|
||||
* @brief AVR architecture port macros and structures.
|
||||
*
|
||||
* @addtogroup AVR_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCORE_H_
|
||||
#define _CHCORE_H_
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
|
||||
#if CH_DBG_ENABLE_STACK_CHECK
|
||||
#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief If enabled allows the idle thread to enter a low power mode.
|
||||
*/
|
||||
#ifndef ENABLE_WFI_IDLE
|
||||
#define ENABLE_WFI_IDLE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Macro defining the AVR architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_AVR
|
||||
|
||||
/**
|
||||
* @brief Name of the implemented architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_NAME "AVR"
|
||||
|
||||
/**
|
||||
* @brief Name of the architecture variant (optional).
|
||||
*/
|
||||
#define CH_CORE_VARIANT_NAME "MegaAVR"
|
||||
|
||||
/**
|
||||
* @brief Name of the compiler supported by this port.
|
||||
*/
|
||||
#define CH_COMPILER_NAME "GCC " __VERSION__
|
||||
|
||||
/**
|
||||
* @brief Port-specific information string.
|
||||
*/
|
||||
#define CH_PORT_INFO "None"
|
||||
|
||||
/**
|
||||
* @brief 8 bits stack and memory alignment enforcement.
|
||||
*/
|
||||
typedef uint8_t stkalign_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt saved context.
|
||||
* @details This structure represents the stack frame saved during a
|
||||
* preemption-capable interrupt handler.
|
||||
* @note The field @p _next is not part of the context, it represents the
|
||||
* offset of the structure relative to the stack pointer.
|
||||
*/
|
||||
struct extctx {
|
||||
uint8_t _next;
|
||||
uint8_t r31;
|
||||
uint8_t r30;
|
||||
uint8_t r27;
|
||||
uint8_t r26;
|
||||
uint8_t r25;
|
||||
uint8_t r24;
|
||||
uint8_t r23;
|
||||
uint8_t r22;
|
||||
uint8_t r21;
|
||||
uint8_t r20;
|
||||
uint8_t r19;
|
||||
uint8_t r18;
|
||||
uint8_t sr;
|
||||
uint8_t r1;
|
||||
uint8_t r0;
|
||||
uint16_t pc;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief System saved context.
|
||||
* @details This structure represents the inner stack frame during a context
|
||||
* switching.
|
||||
* @note The field @p _next is not part of the context, it represents the
|
||||
* offset of the structure relative to the stack pointer.
|
||||
*/
|
||||
struct intctx {
|
||||
uint8_t _next;
|
||||
uint8_t r29;
|
||||
uint8_t r28;
|
||||
uint8_t r17;
|
||||
uint8_t r16;
|
||||
uint8_t r15;
|
||||
uint8_t r14;
|
||||
uint8_t r13;
|
||||
uint8_t r12;
|
||||
uint8_t r11;
|
||||
uint8_t r10;
|
||||
uint8_t r9;
|
||||
uint8_t r8;
|
||||
uint8_t r7;
|
||||
uint8_t r6;
|
||||
uint8_t r5;
|
||||
uint8_t r4;
|
||||
uint8_t r3;
|
||||
uint8_t r2;
|
||||
uint8_t pcl;
|
||||
uint8_t pch;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p Thread structure.
|
||||
* @details In the AVR port this structure just holds a pointer to the
|
||||
* @p intctx structure representing the stack pointer at the time
|
||||
* of the context switch.
|
||||
*/
|
||||
struct context {
|
||||
struct intctx *sp;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p chThdCreateI() API.
|
||||
* @details This code usually setup the context switching frame represented
|
||||
* by an @p intctx structure.
|
||||
*/
|
||||
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
|
||||
tp->p_ctx.sp = (struct intctx*)((uint8_t *)workspace + wsize - \
|
||||
sizeof(struct intctx)); \
|
||||
tp->p_ctx.sp->r2 = (int)pf; \
|
||||
tp->p_ctx.sp->r3 = (int)pf >> 8; \
|
||||
tp->p_ctx.sp->r4 = (int)arg; \
|
||||
tp->p_ctx.sp->r5 = (int)arg >> 8; \
|
||||
tp->p_ctx.sp->pcl = (int)_port_thread_start >> 8; \
|
||||
tp->p_ctx.sp->pch = (int)_port_thread_start; \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stack size for the system idle thread.
|
||||
* @details This size depends on the idle thread implementation, usually
|
||||
* the idle thread should take no more space than those reserved
|
||||
* by @p PORT_INT_REQUIRED_STACK.
|
||||
* @note In this port it is set to 8.
|
||||
*/
|
||||
#ifndef PORT_IDLE_THREAD_STACK_SIZE
|
||||
#define PORT_IDLE_THREAD_STACK_SIZE 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Per-thread stack overhead for interrupts servicing.
|
||||
* @details This constant is used in the calculation of the correct working
|
||||
* area size.
|
||||
* This value can be zero on those architecture where there is a
|
||||
* separate interrupt stack and the stack space between @p intctx and
|
||||
* @p extctx is known to be zero.
|
||||
* @note In this port the default is 32 bytes per thread.
|
||||
*/
|
||||
#ifndef PORT_INT_REQUIRED_STACK
|
||||
#define PORT_INT_REQUIRED_STACK 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enforces a correct alignment for a stack area size value.
|
||||
*/
|
||||
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
|
||||
|
||||
/**
|
||||
* @brief Computes the thread working area global size.
|
||||
*/
|
||||
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
|
||||
(sizeof(struct intctx) - 1) + \
|
||||
(sizeof(struct extctx) - 1) + \
|
||||
(n) + (PORT_INT_REQUIRED_STACK))
|
||||
|
||||
/**
|
||||
* @brief Static working area allocation.
|
||||
* @details This macro is used to allocate a static thread working area
|
||||
* aligned as both position and size.
|
||||
*/
|
||||
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
|
||||
|
||||
/**
|
||||
* @brief IRQ prologue code.
|
||||
* @details This macro must be inserted at the start of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
* @note This code tricks the compiler to save all the specified registers
|
||||
* by "touching" them.
|
||||
*/
|
||||
#define PORT_IRQ_PROLOGUE() { \
|
||||
asm ("" : : : "r18", "r19", "r20", "r21", "r22", "r23", "r24", \
|
||||
"r25", "r26", "r27", "r30", "r31"); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
* @details This macro must be inserted at the end of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_EPILOGUE() { \
|
||||
dbg_check_lock(); \
|
||||
if (chSchIsPreemptionRequired()) \
|
||||
chSchDoReschedule(); \
|
||||
dbg_check_unlock(); \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#define PORT_IRQ_HANDLER(id) ISR(id)
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_init()
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action.
|
||||
* @details Usually this function just disables interrupts but may perform more
|
||||
* actions.
|
||||
* @note Implemented as global interrupt disable.
|
||||
*/
|
||||
#define port_lock() asm volatile ("cli" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action.
|
||||
* @details Usually this function just enables interrupts but may perform more
|
||||
* actions.
|
||||
* @note Implemented as global interrupt enable.
|
||||
*/
|
||||
#define port_unlock() asm volatile ("sei" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action from an interrupt handler.
|
||||
* @details This function is invoked before invoking I-class APIs from
|
||||
* interrupt handlers. The implementation is architecture dependent,
|
||||
* in its simplest form it is void.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_lock_from_isr()
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action from an interrupt handler.
|
||||
* @details This function is invoked after invoking I-class APIs from interrupt
|
||||
* handlers. The implementation is architecture dependent, in its
|
||||
* simplest form it is void.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_unlock_from_isr()
|
||||
|
||||
/**
|
||||
* @brief Disables all the interrupt sources.
|
||||
* @note Of course non-maskable interrupt sources are not included.
|
||||
* @note Implemented as global interrupt disable.
|
||||
*/
|
||||
#define port_disable() asm volatile ("cli" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Disables the interrupt sources below kernel-level priority.
|
||||
* @note Interrupt sources above kernel level remains enabled.
|
||||
* @note Same as @p port_disable() in this port, there is no difference
|
||||
* between the two states.
|
||||
*/
|
||||
#define port_suspend() asm volatile ("cli" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Enables all the interrupt sources.
|
||||
* @note Implemented as global interrupt enable.
|
||||
*/
|
||||
#define port_enable() asm volatile ("sei" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Enters an architecture-dependent IRQ-waiting mode.
|
||||
* @details The function is meant to return when an interrupt becomes pending.
|
||||
* The simplest implementation is an empty function or macro but this
|
||||
* would not take advantage of architecture-specific power saving
|
||||
* modes.
|
||||
* @note This port function is implemented as inlined code for performance
|
||||
* reasons.
|
||||
*/
|
||||
#if ENABLE_WFI_IDLE != 0
|
||||
#define port_wait_for_interrupt() { \
|
||||
asm volatile ("sleep" : : : "memory"); \
|
||||
}
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void port_switch(Thread *ntp, Thread *otp);
|
||||
void port_halt(void);
|
||||
void _port_thread_start(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _CHCORE_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,87 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file AVR/chtypes.h
|
||||
* @brief AVR architecture port system types.
|
||||
*
|
||||
* @addtogroup AVR_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHTYPES_H_
|
||||
#define _CHTYPES_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
typedef bool bool_t; /**< Fast boolean type. */
|
||||
typedef uint8_t tmode_t; /**< Thread flags. */
|
||||
typedef uint8_t tstate_t; /**< Thread state. */
|
||||
typedef uint8_t trefs_t; /**< Thread references counter. */
|
||||
typedef uint8_t tslices_t; /**< Thread time slices counter. */
|
||||
typedef uint8_t tprio_t; /**< Thread priority. */
|
||||
typedef int16_t msg_t; /**< Inter-thread message. */
|
||||
typedef uint8_t eventid_t; /**< Event Id. */
|
||||
typedef uint8_t eventmask_t; /**< Event mask. */
|
||||
typedef uint8_t flagsmask_t; /**< Event flags. */
|
||||
typedef uint16_t systime_t; /**< System time. */
|
||||
typedef int8_t cnt_t; /**< Resources counter. */
|
||||
|
||||
/**
|
||||
* @brief Inline function modifier.
|
||||
*/
|
||||
#define INLINE inline
|
||||
|
||||
/**
|
||||
* @brief ROM constant modifier.
|
||||
* @note It is set to use the "const" keyword in this port.
|
||||
*/
|
||||
#define ROMCONST const
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (within).
|
||||
* @note It uses the "packed" GCC attribute.
|
||||
*/
|
||||
#define PACK_STRUCT_STRUCT __attribute__((packed))
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (before).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_BEGIN
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (after).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_END
|
||||
|
||||
#endif /* _CHTYPES_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,94 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup AVR MegaAVR
|
||||
* @details AVR port for the GCC compiler.
|
||||
*
|
||||
* @section AVR_STATES Mapping of the System States in the AVR port
|
||||
* The ChibiOS/RT logical @ref system_states are mapped as follow in the AVR
|
||||
* port:
|
||||
* - <b>Init</b>. This state is represented by the startup code and the
|
||||
* initialization code before @p chSysInit() is executed. It has not a
|
||||
* special hardware state associated.
|
||||
* - <b>Normal</b>. This is the state the system has after executing
|
||||
* @p chSysInit(). Interrupts are enabled.
|
||||
* - <b>Suspended</b>. Interrupts are disabled.
|
||||
* - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
|
||||
* Suspended state because there are no fast interrupts in this architecture.
|
||||
* - <b>Sleep</b>. This state is entered with the execution of the specific
|
||||
* instruction @p <b>sleep</b>.
|
||||
* - <b>S-Locked</b>. Interrupts are disabled.
|
||||
* - <b>I-Locked</b>. This state is equivalent to the SRI state, the
|
||||
* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
|
||||
* order to formally change state because this may change).
|
||||
* - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
|
||||
* - <b>Serving Fast Interrupt</b>. Not present in this architecture.
|
||||
* - <b>Serving Non-Maskable Interrupt</b>. Not present in this architecture.
|
||||
* - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
|
||||
* .
|
||||
* @section AVR_NOTES The AVR port notes
|
||||
* - The AVR does not have a dedicated interrupt stack, make sure to reserve
|
||||
* enough stack space for interrupts in each thread stack. This can be done
|
||||
* by modifying the @p INT_REQUIRED_STACK macro into
|
||||
* <b>./ports/AVR/chcore.h</b>.
|
||||
* .
|
||||
* @ingroup gcc
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup AVR_CONF Configuration Options
|
||||
* @details AVR Configuration Options. The AVR port allows some
|
||||
* architecture-specific configurations settings that can be overridden
|
||||
* by redefining them in @p chconf.h. Usually there is no need to change
|
||||
* the default values.
|
||||
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space
|
||||
* used by the interrupt handlers.<br>
|
||||
* The default for this value is @p 32, this space is allocated for each
|
||||
* thread so be careful in order to not waste precious RAM space.
|
||||
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
||||
* thread. Usually there is no need to change this value unless inserting
|
||||
* code in the IDLE thread hook macro.
|
||||
* .
|
||||
* @ingroup AVR
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup AVR_CORE Core Port Implementation
|
||||
* @details AVR specific port code, structures and macros.
|
||||
*
|
||||
* @ingroup AVR
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup AVR_STARTUP Startup Support
|
||||
* @details ChibiOS/RT doed not provide startup files for the AVR, there
|
||||
* are no special startup requirement so the normal toolchain-provided
|
||||
* startup files can be used.
|
||||
*
|
||||
* @ingroup AVR
|
||||
*/
|
||||
@ -0,0 +1,6 @@
|
||||
# List of the ChibiOS/RT AVR port files.
|
||||
PORTSRC = ${CHIBIOS}/os/ports/GCC/AVR/chcore.c
|
||||
|
||||
PORTASM =
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/GCC/AVR
|
||||
@ -0,0 +1,322 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file MSP430/chcore.h
|
||||
* @brief MSP430 architecture port macros and structures.
|
||||
*
|
||||
* @addtogroup MSP430_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHCORE_H_
|
||||
#define _CHCORE_H_
|
||||
|
||||
#include <iomacros.h>
|
||||
#include <isr_compat.h>
|
||||
|
||||
#if CH_DBG_ENABLE_STACK_CHECK
|
||||
#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enables the use of a wait state in the idle thread loop.
|
||||
*/
|
||||
#ifndef ENABLE_WFI_IDLE
|
||||
#define ENABLE_WFI_IDLE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Macro defining the MSP430 architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_MSP430
|
||||
|
||||
/**
|
||||
* @brief Name of the implemented architecture.
|
||||
*/
|
||||
#define CH_ARCHITECTURE_NAME "MSP430"
|
||||
|
||||
/**
|
||||
* @brief Name of the architecture variant (optional).
|
||||
*/
|
||||
#define CH_CORE_VARIANT_NAME "MSP430"
|
||||
|
||||
/**
|
||||
* @brief Name of the compiler supported by this port.
|
||||
*/
|
||||
#define CH_COMPILER_NAME "GCC " __VERSION__
|
||||
|
||||
/**
|
||||
* @brief Port-specific information string.
|
||||
*/
|
||||
#define CH_PORT_INFO "None"
|
||||
|
||||
/**
|
||||
* @brief 16 bits stack and memory alignment enforcement.
|
||||
*/
|
||||
typedef uint16_t stkalign_t;
|
||||
|
||||
/**
|
||||
* @brief Generic MSP430 register.
|
||||
*/
|
||||
typedef void *regmsp_t;
|
||||
|
||||
/**
|
||||
* @brief Interrupt saved context.
|
||||
* @details This structure represents the stack frame saved during a
|
||||
* preemption-capable interrupt handler.
|
||||
*/
|
||||
struct extctx {
|
||||
regmsp_t r12;
|
||||
regmsp_t r13;
|
||||
regmsp_t r14;
|
||||
regmsp_t r15;
|
||||
regmsp_t sr;
|
||||
regmsp_t pc;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief System saved context.
|
||||
* @details This structure represents the inner stack frame during a context
|
||||
* switching.
|
||||
*/
|
||||
struct intctx {
|
||||
regmsp_t r4;
|
||||
regmsp_t r5;
|
||||
regmsp_t r6;
|
||||
regmsp_t r7;
|
||||
regmsp_t r8;
|
||||
regmsp_t r9;
|
||||
regmsp_t r10;
|
||||
regmsp_t r11;
|
||||
regmsp_t pc;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p Thread structure.
|
||||
* @details This structure usually contains just the saved stack pointer
|
||||
* defined as a pointer to a @p intctx structure.
|
||||
*/
|
||||
struct context {
|
||||
struct intctx *sp;
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Platform dependent part of the @p chThdCreateI() API.
|
||||
* @details This code usually setup the context switching frame represented
|
||||
* by an @p intctx structure.
|
||||
*/
|
||||
#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
|
||||
tp->p_ctx.sp = (struct intctx *)((uint8_t *)workspace + \
|
||||
wsize - \
|
||||
sizeof(struct intctx)); \
|
||||
tp->p_ctx.sp->r10 = pf; \
|
||||
tp->p_ctx.sp->r11 = arg; \
|
||||
tp->p_ctx.sp->pc = _port_thread_start; \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Stack size for the system idle thread.
|
||||
* @details This size depends on the idle thread implementation, usually
|
||||
* the idle thread should take no more space than those reserved
|
||||
* by @p PORT_INT_REQUIRED_STACK.
|
||||
*/
|
||||
#ifndef PORT_IDLE_THREAD_STACK_SIZE
|
||||
#define PORT_IDLE_THREAD_STACK_SIZE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Per-thread stack overhead for interrupts servicing.
|
||||
* @details This constant is used in the calculation of the correct working
|
||||
* area size.
|
||||
* This value can be zero on those architecture where there is a
|
||||
* separate interrupt stack and the stack space between @p intctx and
|
||||
* @p extctx is known to be zero.
|
||||
* @note In this port the default is 32 bytes per thread.
|
||||
*/
|
||||
#ifndef PORT_INT_REQUIRED_STACK
|
||||
#define PORT_INT_REQUIRED_STACK 32
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Enforces a correct alignment for a stack area size value.
|
||||
*/
|
||||
#define STACK_ALIGN(n) ((((n) - 1) | (sizeof(stkalign_t) - 1)) + 1)
|
||||
|
||||
/**
|
||||
* @brief Computes the thread working area global size.
|
||||
*/
|
||||
#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \
|
||||
sizeof(struct intctx) + \
|
||||
sizeof(struct extctx) + \
|
||||
(n) + (PORT_INT_REQUIRED_STACK))
|
||||
|
||||
/**
|
||||
* @brief Static working area allocation.
|
||||
* @details This macro is used to allocate a static thread working area
|
||||
* aligned as both position and size.
|
||||
*/
|
||||
#define WORKING_AREA(s, n) stkalign_t s[THD_WA_SIZE(n) / sizeof(stkalign_t)]
|
||||
|
||||
/**
|
||||
* @brief IRQ prologue code.
|
||||
* @details This macro must be inserted at the start of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_PROLOGUE()
|
||||
|
||||
/**
|
||||
* @brief IRQ epilogue code.
|
||||
* @details This macro must be inserted at the end of all IRQ handlers
|
||||
* enabled to invoke system APIs.
|
||||
*/
|
||||
#define PORT_IRQ_EPILOGUE() { \
|
||||
dbg_check_lock(); \
|
||||
if (chSchIsPreemptionRequired()) \
|
||||
chSchDoReschedule(); \
|
||||
dbg_check_unlock(); \
|
||||
}
|
||||
|
||||
#define ISRNAME(pre, id) pre##id
|
||||
|
||||
/**
|
||||
* @brief IRQ handler function declaration.
|
||||
* @note @p id can be a function name or a vector number depending on the
|
||||
* port implementation.
|
||||
*/
|
||||
#define PORT_IRQ_HANDLER(id) ISR(id, ISRNAME(vect, id))
|
||||
|
||||
/**
|
||||
* @brief Port-related initialization code.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_init()
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action.
|
||||
* @details Usually this function just disables interrupts but may perform more
|
||||
* actions.
|
||||
* @note Implemented as global interrupt disable.
|
||||
*/
|
||||
#define port_lock() asm volatile ("dint" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action.
|
||||
* @details Usually this function just enables interrupts but may perform more
|
||||
* actions.
|
||||
* @note Implemented as global interrupt enable.
|
||||
*/
|
||||
#define port_unlock() asm volatile ("eint" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Kernel-lock action from an interrupt handler.
|
||||
* @details This function is invoked before invoking I-class APIs from
|
||||
* interrupt handlers. The implementation is architecture dependen#define PORT_IRQ_EPILOGUE() { \
|
||||
if (chSchIsPreemptionRequired()) \
|
||||
chSchDoReschedule(); \
|
||||
}
|
||||
* t,
|
||||
* in its simplest form it is void.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_lock_from_isr()
|
||||
|
||||
/**
|
||||
* @brief Kernel-unlock action from an interrupt handler.
|
||||
* @details This function is invoked after invoking I-class APIs from interrupt
|
||||
* handlers. The implementation is architecture dependent, in its
|
||||
* simplest form it is void.
|
||||
* @note This function is empty in this port.
|
||||
*/
|
||||
#define port_unlock_from_isr()
|
||||
|
||||
/**
|
||||
* @brief Disables all the interrupt sources.
|
||||
* @note Of course non-maskable interrupt sources are not included.
|
||||
* @note Implemented as global interrupt disable.
|
||||
*/
|
||||
#define port_disable() asm volatile ("dint" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Disables the interrupt sources below kernel-level priority.
|
||||
* @note Interrupt sources above kernel level remains enabled.
|
||||
* @note Same as @p port_disable() in this port, there is no difference
|
||||
* between the two states.
|
||||
*/
|
||||
#define port_suspend() asm volatile ("dint" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Enables all the interrupt sources.
|
||||
* @note Implemented as global interrupt enable.
|
||||
*/
|
||||
#define port_enable() asm volatile ("eint" : : : "memory")
|
||||
|
||||
/**
|
||||
* @brief Enters an architecture-dependent IRQ-waiting mode.
|
||||
* @details The function is meant to return when an interrupt becomes pending.
|
||||
* The simplest implementation is an empty function or macro but this
|
||||
* would not take advantage of architecture-specific power saving
|
||||
* modes.
|
||||
* @note This port function is implemented as inlined code for performance
|
||||
* reasons.
|
||||
* @note The port code does not define a low power mode, this macro has to
|
||||
* be defined externally. The default implementation is a "nop", not
|
||||
* a real low power mode.
|
||||
*/
|
||||
#if ENABLE_WFI_IDLE != 0
|
||||
#ifndef port_wait_for_interrupt
|
||||
#define port_wait_for_interrupt() { \
|
||||
asm volatile ("nop" : : : "memory"); \
|
||||
}
|
||||
#endif
|
||||
#else
|
||||
#define port_wait_for_interrupt()
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Wrapper of the assembler @p _port_switch() function.
|
||||
*/
|
||||
#define port_switch(ntp, otp) _port_switch(ntp, otp)
|
||||
|
||||
/**
|
||||
* @brief Wrapper of the assembler @p _port_halt() function.
|
||||
*/
|
||||
#define port_halt() _port_halt()
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void _port_switch(Thread *ntp, Thread *otp);
|
||||
void _port_halt(void);
|
||||
void _port_thread_start(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _CHCORE_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,73 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
#include "chconf.h"
|
||||
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
|
||||
.text
|
||||
.p2align 1, 0
|
||||
.weak _port_switch
|
||||
_port_switch:
|
||||
push r11
|
||||
push r10
|
||||
push r9
|
||||
push r8
|
||||
push r7
|
||||
push r6
|
||||
push r5
|
||||
push r4
|
||||
mov r1, 6(r14)
|
||||
mov 6(r15), r1
|
||||
pop r4
|
||||
pop r5
|
||||
pop r6
|
||||
pop r7
|
||||
pop r8
|
||||
pop r9
|
||||
pop r10
|
||||
pop r11
|
||||
ret
|
||||
|
||||
.p2align 1, 0
|
||||
.weak _port_thread_start
|
||||
_port_thread_start:
|
||||
#if CH_DBG_SYSTEM_STATE_CHECK
|
||||
call #dbg_check_unlock
|
||||
#endif
|
||||
eint
|
||||
mov r11, r15
|
||||
call r10
|
||||
call #chThdExit
|
||||
; Falls into _port_halt
|
||||
|
||||
.p2align 1, 0
|
||||
.weak _port_halt
|
||||
_port_halt:
|
||||
dint
|
||||
.L1: jmp .L1
|
||||
@ -0,0 +1,87 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file MSP430/chtypes.h
|
||||
* @brief MSP430 architecture port system types.
|
||||
*
|
||||
* @addtogroup MSP430_CORE
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _CHTYPES_H_
|
||||
#define _CHTYPES_H_
|
||||
|
||||
#include <stddef.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
typedef bool bool_t; /**< Fast boolean type. */
|
||||
typedef uint8_t tmode_t; /**< Thread flags. */
|
||||
typedef uint8_t tstate_t; /**< Thread state. */
|
||||
typedef uint8_t trefs_t; /**< Thread references counter. */
|
||||
typedef uint8_t tslices_t; /**< Thread time slices counter. */
|
||||
typedef uint16_t tprio_t; /**< Thread priority. */
|
||||
typedef int16_t msg_t; /**< Inter-thread message. */
|
||||
typedef int16_t eventid_t; /**< Event Id. */
|
||||
typedef uint16_t eventmask_t; /**< Event mask. */
|
||||
typedef uint16_t flagsmask_t; /**< Event flags. */
|
||||
typedef uint16_t systime_t; /**< System time. */
|
||||
typedef int16_t cnt_t; /**< Resources counter. */
|
||||
|
||||
/**
|
||||
* @brief Inline function modifier.
|
||||
*/
|
||||
#define INLINE inline
|
||||
|
||||
/**
|
||||
* @brief ROM constant modifier.
|
||||
* @note It is set to use the "const" keyword in this port.
|
||||
*/
|
||||
#define ROMCONST const
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (within).
|
||||
* @note It uses the "packed" GCC attribute.
|
||||
*/
|
||||
#define PACK_STRUCT_STRUCT __attribute__((packed))
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (before).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_BEGIN
|
||||
|
||||
/**
|
||||
* @brief Packed structure modifier (after).
|
||||
* @note Empty in this port.
|
||||
*/
|
||||
#define PACK_STRUCT_END
|
||||
|
||||
#endif /* _CHTYPES_H_ */
|
||||
|
||||
/** @} */
|
||||
@ -0,0 +1,102 @@
|
||||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012,2013 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
---
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes ChibiOS/RT, without being obliged to provide
|
||||
the source code for any proprietary components. See the file exception.txt
|
||||
for full details of how and when the exception can be applied.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MSP430 MSP430
|
||||
* @details MSP430 port for the GCC compiler.
|
||||
*
|
||||
* @section MSP430_INTRO Introduction
|
||||
* This port supports all the cores implementing the MSP430 architecture.
|
||||
*
|
||||
* @section MSP430_STATES Mapping of the System States in the MSP430 port
|
||||
* The ChibiOS/RT logical @ref system_states are mapped as follow in the MSP430
|
||||
* port:
|
||||
* - <b>Init</b>. This state is represented by the startup code and the
|
||||
* initialization code before @p chSysInit() is executed. It has not a
|
||||
* special hardware state associated.
|
||||
* - <b>Normal</b>. This is the state the system has after executing
|
||||
* @p chSysInit(). Interrupts are enabled.
|
||||
* - <b>Suspended</b>. Interrupts are disabled.
|
||||
* - <b>Disabled</b>. Interrupts are disabled. This state is equivalent to the
|
||||
* Suspended state because there are no fast interrupts in this architecture.
|
||||
* - <b>Sleep</b>. Not yet implemented.
|
||||
* - <b>S-Locked</b>. Interrupts are disabled.
|
||||
* - <b>I-Locked</b>. This state is equivalent to the SRI state, the
|
||||
* @p chSysLockI() and @p chSysUnlockI() APIs do nothing (still use them in
|
||||
* order to formally change state because this may change).
|
||||
* - <b>Serving Regular Interrupt</b>. Normal interrupt service code.
|
||||
* - <b>Serving Fast Interrupt</b>. Not present in this architecture.
|
||||
* - <b>Serving Non-Maskable Interrupt</b>. The MSP430 has several non
|
||||
* maskable interrupt sources that can be associated to this state.
|
||||
* - <b>Halted</b>. Implemented as an infinite loop with interrupts disabled.
|
||||
* .
|
||||
* @section MSP430_NOTES The MSP430 port notes
|
||||
* - The MSP430 does not have a dedicated interrupt stack, make sure to reserve
|
||||
* enough stack space for interrupts in each thread stack. This can be done
|
||||
* by modifying the @p INT_REQUIRED_STACK configuration options.
|
||||
* - The state of the hardware multiplier is not saved in the thread context,
|
||||
* make sure to use it in <b>Suspended</b> state (interrupts masked).
|
||||
* - The port code does not define the switch to a low power mode for the
|
||||
* idle thread because the MSP430 has several low power modes. You can
|
||||
* select the proper low power mode for you application by defining the
|
||||
* macro @p port_wait_for_interrupt().
|
||||
* .
|
||||
* @ingroup gcc
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MSP430_CONF Configuration Options
|
||||
* @details MSP430 Configuration Options. The MSP430 port allows some
|
||||
* architecture-specific configurations settings that can be overridden
|
||||
* by redefining them in @p chconf.h. Usually there is no need to change
|
||||
* the default values.
|
||||
* - @p INT_REQUIRED_STACK, this value represent the amount of stack space
|
||||
* used by the interrupt handlers.<br>
|
||||
* The default for this value is @p 32, this space is allocated for each
|
||||
* thread so be careful in order to not waste precious RAM space.
|
||||
* - @p IDLE_THREAD_STACK_SIZE, stack area size to be assigned to the IDLE
|
||||
* thread. Usually there is no need to change this value unless inserting
|
||||
* code in the IDLE thread hook macro.
|
||||
* .
|
||||
* @ingroup MSP430
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MSP430_CORE Core Port Implementation
|
||||
* @details MSP430 specific port code, structures and macros.
|
||||
*
|
||||
* @ingroup MSP430
|
||||
*/
|
||||
|
||||
/**
|
||||
* @defgroup MSP430_STARTUP Startup Support
|
||||
* @details ChibiOS/RT doed not provide startup files for the MSP430, there
|
||||
* are no special startup requirement so the normal toolchain-provided
|
||||
* startup files can be used.
|
||||
*
|
||||
* @ingroup MSP430
|
||||
*/
|
||||
@ -0,0 +1,6 @@
|
||||
# List of the ChibiOS/RT MSP430 port files.
|
||||
PORTSRC =
|
||||
|
||||
PORTASM = ${CHIBIOS}/os/ports/GCC/MSP430/chcoreasm.s
|
||||
|
||||
PORTINC = ${CHIBIOS}/os/ports/GCC/MSP430
|
||||
@ -0,0 +1,88 @@
|
||||
# MSP430 makefile scripts and rules.
|
||||
|
||||
# Automatic compiler options
|
||||
OPT = $(USE_OPT)
|
||||
COPT = $(USE_COPT)
|
||||
CPPOPT = $(USE_CPPOPT)
|
||||
ifeq ($(USE_LINK_GC),yes)
|
||||
OPT += -ffunction-sections -fdata-sections
|
||||
endif
|
||||
|
||||
# Source files groups
|
||||
SRC = $(CSRC)$(CPPSRC)
|
||||
|
||||
# Object files groups
|
||||
COBJS = $(CSRC:.c=.o)
|
||||
CPPOBJS = $(CPPSRC:.cpp=.o)
|
||||
ASMOBJS = $(ASMSRC:.s=.o)
|
||||
OBJS = $(ASMOBJS) $(COBJS) $(CPPOBJS)
|
||||
|
||||
# Paths
|
||||
IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
|
||||
LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
|
||||
|
||||
# Macros
|
||||
DEFS = $(DDEFS) $(UDEFS)
|
||||
ADEFS = $(DADEFS) $(UADEFS)
|
||||
|
||||
# Libs
|
||||
LIBS = $(DLIBS) $(ULIBS)
|
||||
|
||||
MCFLAGS = -mmcu=$(MCU)
|
||||
ODFLAGS = -x --syms
|
||||
ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
|
||||
CPFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(WARN) -Wa,-alms=$(<:.c=.lst) $(DEFS)
|
||||
ifeq ($(LINK_GC),yes)
|
||||
LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections $(LLIBDIR)
|
||||
else
|
||||
LDFLAGS = $(MCFLAGS) -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LLIBDIR)
|
||||
endif
|
||||
|
||||
# Generate dependency information
|
||||
ASFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
CPFLAGS += -MD -MP -MF .dep/$(@F).d
|
||||
|
||||
#
|
||||
# Makefile rules
|
||||
#
|
||||
all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dmp MAKE_ALL_RULE_HOOK
|
||||
|
||||
MAKE_ALL_RULE_HOOK:
|
||||
|
||||
$(CPPOBJS) : %.o : %.cpp
|
||||
@echo
|
||||
$(CPPC) -c $(CPPFLAGS) -I . $(IINCDIR) $< -o $@
|
||||
|
||||
$(COBJS) : %.o : %.c
|
||||
@echo
|
||||
$(CC) -c $(CPFLAGS) -I . $(IINCDIR) $< -o $@
|
||||
|
||||
$(ASMOBJS) : %.o : %.s
|
||||
@echo
|
||||
$(AS) -c $(ASFLAGS) -I . $(IINCDIR) $< -o $@
|
||||
|
||||
%elf: $(OBJS)
|
||||
@echo
|
||||
$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
|
||||
|
||||
%hex: %elf
|
||||
$(HEX) $< $@
|
||||
|
||||
%bin: %elf
|
||||
$(BIN) $< $@
|
||||
|
||||
%dmp: %elf
|
||||
$(OD) $(ODFLAGS) $< > $@
|
||||
|
||||
clean:
|
||||
-rm -f $(OBJS)
|
||||
-rm -f $(CSRC:.c=.lst) $(CPPSRC:.cpp=.lst) $(ASMSRC:.s=.lst)
|
||||
-rm -f $(PROJECT).elf $(PROJECT).dmp $(PROJECT).map $(PROJECT).hex $(PROJECT).bin
|
||||
-rm -fR .dep
|
||||
|
||||
#
|
||||
# Include the dependency files, should be the last of the makefile
|
||||
#
|
||||
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
|
||||
|
||||
# *** EOF ***
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user