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RocketGod
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/**
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* @brief PAL setup.
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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const PALConfig pal_default_config =
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{
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#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
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{VAL_P1OUT, VAL_P1DIR},
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#endif
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#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
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{VAL_P2OUT, VAL_P2DIR},
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#endif
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#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
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{VAL_P3OUT, VAL_P3DIR},
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#endif
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#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
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{VAL_P4OUT, VAL_P4DIR},
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#endif
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#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
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{VAL_P5OUT, VAL_P5DIR},
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#endif
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#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
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{VAL_P6OUT, VAL_P6DIR},
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#endif
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};
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#endif
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CH_IRQ_HANDLER(TIMERA0) {
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CH_IRQ_PROLOGUE();
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chSysLockFromIsr();
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chSysTimerHandlerI();
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chSysUnlockFromIsr();
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CH_IRQ_EPILOGUE();
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}
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/*
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* Board-specific initialization code.
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*/
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void boardInit(void) {
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#if USE_MSP430_USART0
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P3SEL |= (1 << 4) | (1 << 5);
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#endif
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#if USE_MSP430_USART1
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P3SEL |= (1 << 6) | (1 << 7);
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#endif
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/*
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* Timer 0 setup, uses SMCLK as source.
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*/
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TACCR0 = SMCLK / 4 / CH_FREQUENCY - 1;/* Counter limit. */
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TACTL = TACLR; /* Clean start. */
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TACTL = TASSEL_2 | ID_2 | MC_1; /* Src=SMCLK, ID=4, cmp=TACCR0. */
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TACCTL0 = CCIE; /* Interrupt on compare. */
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}
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@ -0,0 +1,80 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for the Olimex MSP430-P1611 proto board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_OLIMEX_MSP430_P1611
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#define BOARD_NAME "Olimex MSP430-P1611"
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/*
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* Clock constants.
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*/
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#define LFXT1CLK 32768
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#define XT2CLK 8000000
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#define DCOCLK 750000
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/*
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* Pin definitions for the Olimex MSP430-P1611 board.
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*/
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#define P3_O_TXD0 4
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#define P3_O_TXD0_MASK (1 << P3_O_TXD0)
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#define P3_I_RXD0 5
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#define P3_I_RXD0_MASK (1 << P3_I_RXD0)
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#define P6_O_LED 0
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#define P6_O_LED_MASK (1 << P6_O_LED)
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#define P6_I_BUTTON 1
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#define P6_I_BUTTON_MASK (1 << P6_I_BUTTON)
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/*
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* Initial I/O ports settings.
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*/
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#define VAL_P1OUT 0x00
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#define VAL_P1DIR 0xFF
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#define VAL_P2OUT 0x00
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#define VAL_P2DIR 0xFF
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#define VAL_P3OUT P3_O_TXD0_MASK
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#define VAL_P3DIR ~P3_I_RXD0_MASK
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#define VAL_P4OUT 0x00
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#define VAL_P4DIR 0xFF
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#define VAL_P5OUT 0x00
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#define VAL_P5DIR 0xFF
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#define VAL_P6OUT P6_O_LED_MASK
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#define VAL_P6DIR ~P6_I_BUTTON_MASK
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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# List of all the board related files.
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BOARDSRC = ${CHIBIOS}/boards/OLIMEX_MSP430_P1611/board.c
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# Required include directories
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BOARDINC = ${CHIBIOS}/boards/OLIMEX_MSP430_P1611
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