110 lines
3.1 KiB
C
110 lines
3.1 KiB
C
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/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "spi_ssp.h"
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#include <libopencm3/lpc43xx/rgu.h>
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#include <libopencm3/lpc43xx/ssp.h>
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void spi_ssp_start(spi_bus_t* const bus, const void* const _config) {
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const ssp_config_t* const config = _config;
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if( bus->obj == (void*)SSP0_BASE ) {
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/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
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RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
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}
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gpio_set(config->gpio_select);
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gpio_output(config->gpio_select);
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SSP_CR1(bus->obj) = 0;
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SSP_CPSR(bus->obj) = config->clock_prescale_rate;
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SSP_CR0(bus->obj) =
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(config->serial_clock_rate << 8)
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| SSP_CPOL_0_CPHA_0
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| SSP_FRAME_SPI
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| config->data_bits
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;
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SSP_CR1(bus->obj) =
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SSP_SLAVE_OUT_ENABLE
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| SSP_MASTER
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| SSP_ENABLE
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| SSP_MODE_NORMAL
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;
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bus->config = config;
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}
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void spi_ssp_stop(spi_bus_t* const bus) {
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SSP_CR1(bus->obj) = 0;
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}
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static void spi_ssp_wait_for_tx_fifo_not_full(spi_bus_t* const bus) {
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while( (SSP_SR(bus->obj) & SSP_SR_TNF) == 0 );
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}
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static void spi_ssp_wait_for_rx_fifo_not_empty(spi_bus_t* const bus) {
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while( (SSP_SR(bus->obj) & SSP_SR_RNE) == 0 );
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}
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static void spi_ssp_wait_for_not_busy(spi_bus_t* const bus) {
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while( SSP_SR(bus->obj) & SSP_SR_BSY );
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}
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static uint32_t spi_ssp_transfer_word(spi_bus_t* const bus, const uint32_t data) {
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spi_ssp_wait_for_tx_fifo_not_full(bus);
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SSP_DR(bus->obj) = data;
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spi_ssp_wait_for_not_busy(bus);
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spi_ssp_wait_for_rx_fifo_not_empty(bus);
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return SSP_DR(bus->obj);
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}
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void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count) {
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const ssp_config_t* const config = bus->config;
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const bool word_size_u16 = (SSP_CR0(bus->obj) & 0xf) > SSP_DATA_8BITS;
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gpio_clear(config->gpio_select);
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for(size_t i=0; i<count; i++) {
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const size_t data_count = transfers[i].count;
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if( word_size_u16 ) {
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uint16_t* const data = transfers[i].data;
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for(size_t j=0; j<data_count; j++) {
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data[j] = spi_ssp_transfer_word(bus, data[j]);
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}
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} else {
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uint8_t* const data = transfers[i].data;
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for(size_t j=0; j<data_count; j++) {
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data[j] = spi_ssp_transfer_word(bus, data[j]);
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}
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}
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}
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gpio_set(config->gpio_select);
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}
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void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count) {
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const spi_transfer_t transfers[] = {
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{ data, count },
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};
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spi_ssp_transfer_gather(bus, transfers, 1);
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}
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